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1 /*
2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
10
11 #define CONFIG_MX53
12 #define CONFIG_MXC_GPIO
13
14 #include <asm/arch/imx-regs.h>
15
16 #define CONFIG_REVISION_TAG
17 #define CONFIG_SYS_NO_FLASH
18 #define CONFIG_SYS_FSL_CLK
19
20 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
21
22 /*
23 * U-Boot Commands
24 */
25 #define CONFIG_DOS_PARTITION
26 #define CONFIG_FAT_WRITE
27
28 #define CONFIG_CMD_BMP
29 #define CONFIG_CMD_DATE
30 #define CONFIG_CMD_NAND
31 #define CONFIG_CMD_NAND_TRIMFFS
32 #define CONFIG_CMD_SATA
33
34 /*
35 * Memory configurations
36 */
37 #define CONFIG_NR_DRAM_BANKS 2
38 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
39 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
40 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
41 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
42 #define PHYS_SDRAM_SIZE (gd->ram_size)
43 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
44 #define CONFIG_SYS_MEMTEST_START 0x70000000
45 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
46
47 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
48 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
49 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
50
51 #define CONFIG_SYS_INIT_SP_OFFSET \
52 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53 #define CONFIG_SYS_INIT_SP_ADDR \
54 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55
56 #define CONFIG_SYS_TEXT_BASE 0x71000000
57
58 /*
59 * U-Boot general configurations
60 */
61 #define CONFIG_SYS_LONGHELP
62 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
63 #define CONFIG_SYS_PBSIZE \
64 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
65 /* Print buffer size */
66 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
67 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
68 /* Boot argument buffer size */
69 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
70 #define CONFIG_CMDLINE_EDITING /* Command history etc */
71
72 /*
73 * Serial Driver
74 */
75 #define CONFIG_MXC_UART
76 #define CONFIG_MXC_UART_BASE UART2_BASE
77 #define CONFIG_CONS_INDEX 1
78 #define CONFIG_BAUDRATE 115200
79
80 /*
81 * MMC Driver
82 */
83 #ifdef CONFIG_CMD_MMC
84 #define CONFIG_GENERIC_MMC
85 #define CONFIG_FSL_ESDHC
86 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
87 #define CONFIG_SYS_FSL_ESDHC_NUM 1
88 #endif
89
90 /*
91 * NAND
92 */
93 #define CONFIG_ENV_SIZE (16 * 1024)
94 #ifdef CONFIG_CMD_NAND
95 #define CONFIG_SYS_MAX_NAND_DEVICE 1
96 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
97 #define CONFIG_NAND_MXC
98 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
99 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
100 #define CONFIG_SYS_NAND_LARGEPAGE
101 #define CONFIG_MXC_NAND_HWECC
102 #define CONFIG_SYS_NAND_USE_FLASH_BBT
103
104 /* Environment is in NAND */
105 #define CONFIG_ENV_IS_IN_NAND
106 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
107 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
108 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
109 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
110 #define CONFIG_ENV_OFFSET_REDUND \
111 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
112
113 #define CONFIG_CMD_UBIFS
114 #define CONFIG_CMD_MTDPARTS
115 #define CONFIG_RBTREE
116 #define CONFIG_LZO
117 #define CONFIG_MTD_DEVICE
118 #define CONFIG_MTD_PARTITIONS
119 #define MTDIDS_DEFAULT "nand0=mxc_nand"
120 #define MTDPARTS_DEFAULT \
121 "mtdparts=mxc_nand:" \
122 "1024k(u-boot)," \
123 "512k(env1)," \
124 "512k(env2)," \
125 "14m(boot)," \
126 "240m(data)," \
127 "-@2048k(UBI)"
128 #else
129 #define CONFIG_ENV_IS_NOWHERE
130 #endif
131
132 /*
133 * Ethernet on SOC (FEC)
134 */
135 #ifdef CONFIG_CMD_NET
136 #define CONFIG_FEC_MXC
137 #define IMX_FEC_BASE FEC_BASE_ADDR
138 #define CONFIG_FEC_MXC_PHYADDR 0x0
139 #define CONFIG_MII
140 #define CONFIG_DISCOVER_PHY
141 #define CONFIG_FEC_XCV_TYPE RMII
142 #define CONFIG_PHYLIB
143 #define CONFIG_PHY_MICREL
144 #define CONFIG_ETHPRIME "FEC0"
145 #endif
146
147 /*
148 * I2C
149 */
150 #ifdef CONFIG_CMD_I2C
151 #define CONFIG_SYS_I2C
152 #define CONFIG_SYS_I2C_MXC
153 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
154 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
155 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
156 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
157 #endif
158
159 /*
160 * RTC
161 */
162 #ifdef CONFIG_CMD_DATE
163 #define CONFIG_RTC_M41T62
164 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
165 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
166 #endif
167
168 /*
169 * USB
170 */
171 #ifdef CONFIG_CMD_USB
172 #define CONFIG_USB_EHCI
173 #define CONFIG_USB_EHCI_MX5
174 #define CONFIG_USB_HOST_ETHER
175 #define CONFIG_USB_ETHER_ASIX
176 #define CONFIG_USB_ETHER_MCS7830
177 #define CONFIG_USB_ETHER_SMSC95XX
178 #define CONFIG_MXC_USB_PORT 1
179 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
180 #define CONFIG_MXC_USB_FLAGS 0
181 #endif
182
183 /*
184 * SATA
185 */
186 #ifdef CONFIG_CMD_SATA
187 #define CONFIG_DWC_AHSATA
188 #define CONFIG_SYS_SATA_MAX_DEVICE 1
189 #define CONFIG_DWC_AHSATA_PORT_ID 0
190 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
191 #define CONFIG_LBA48
192 #define CONFIG_LIBATA
193 #endif
194
195 /*
196 * LCD
197 */
198 #ifdef CONFIG_VIDEO
199 #define CONFIG_VIDEO_IPUV3
200 #define CONFIG_VIDEO_BMP_RLE8
201 #define CONFIG_VIDEO_BMP_GZIP
202 #define CONFIG_SPLASH_SCREEN
203 #define CONFIG_SPLASHIMAGE_GUARD
204 #define CONFIG_SPLASH_SCREEN_ALIGN
205 #define CONFIG_BMP_16BPP
206 #define CONFIG_VIDEO_LOGO
207 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
208 #define CONFIG_IPUV3_CLK 200000000
209 #endif
210
211 /*
212 * Boot Linux
213 */
214 #define CONFIG_CMDLINE_TAG
215 #define CONFIG_INITRD_TAG
216 #define CONFIG_REVISION_TAG
217 #define CONFIG_SETUP_MEMORY_TAGS
218 #define CONFIG_BOOTFILE "fitImage"
219 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
220 #define CONFIG_LOADADDR 0x70800000
221 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
222 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
223
224 /*
225 * NAND SPL
226 */
227 #define CONFIG_SPL_FRAMEWORK
228 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
229 #define CONFIG_SPL_BOARD_INIT
230 #define CONFIG_SPL_TEXT_BASE 0x70008000
231 #define CONFIG_SPL_PAD_TO 0x8000
232 #define CONFIG_SPL_STACK 0x70004000
233
234 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
235 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
236 #define CONFIG_SYS_NAND_OOBSIZE 64
237 #define CONFIG_SYS_NAND_PAGE_COUNT 64
238 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
239 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
240
241 /*
242 * Extra Environments
243 */
244 #define CONFIG_PREBOOT "run try_bootscript"
245 #define CONFIG_HOSTNAME m53evk
246
247 #define CONFIG_EXTRA_ENV_SETTINGS \
248 "consdev=ttymxc1\0" \
249 "baudrate=115200\0" \
250 "bootscript=boot.scr\0" \
251 "bootdev=/dev/mmcblk0p1\0" \
252 "rootdev=/dev/mmcblk0p2\0" \
253 "netdev=eth0\0" \
254 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
255 "kernel_addr_r=0x72000000\0" \
256 "addcons=" \
257 "setenv bootargs ${bootargs} " \
258 "console=${consdev},${baudrate}\0" \
259 "addip=" \
260 "setenv bootargs ${bootargs} " \
261 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
262 "${netmask}:${hostname}:${netdev}:off\0" \
263 "addmisc=" \
264 "setenv bootargs ${bootargs} ${miscargs}\0" \
265 "adddfltmtd=" \
266 "if test \"x${mtdparts}\" == \"x\" ; then " \
267 "mtdparts default ; " \
268 "fi\0" \
269 "addmtd=" \
270 "run adddfltmtd ; " \
271 "setenv bootargs ${bootargs} ${mtdparts}\0" \
272 "addargs=run addcons addmtd addmisc\0" \
273 "mmcload=" \
274 "mmc rescan ; " \
275 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
276 "ubiload=" \
277 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
278 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
279 "netload=" \
280 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
281 "miscargs=nohlt panic=1\0" \
282 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
283 "ubiargs=" \
284 "setenv bootargs ubi.mtd=5 " \
285 "root=ubi0:rootfs rootfstype=ubifs\0" \
286 "nfsargs=" \
287 "setenv bootargs root=/dev/nfs rw " \
288 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
289 "mmc_mmc=" \
290 "run mmcload mmcargs addargs ; " \
291 "bootm ${kernel_addr_r}\0" \
292 "mmc_ubi=" \
293 "run mmcload ubiargs addargs ; " \
294 "bootm ${kernel_addr_r}\0" \
295 "mmc_nfs=" \
296 "run mmcload nfsargs addip addargs ; " \
297 "bootm ${kernel_addr_r}\0" \
298 "ubi_mmc=" \
299 "run ubiload mmcargs addargs ; " \
300 "bootm ${kernel_addr_r}\0" \
301 "ubi_ubi=" \
302 "run ubiload ubiargs addargs ; " \
303 "bootm ${kernel_addr_r}\0" \
304 "ubi_nfs=" \
305 "run ubiload nfsargs addip addargs ; " \
306 "bootm ${kernel_addr_r}\0" \
307 "net_mmc=" \
308 "run netload mmcargs addargs ; " \
309 "bootm ${kernel_addr_r}\0" \
310 "net_ubi=" \
311 "run netload ubiargs addargs ; " \
312 "bootm ${kernel_addr_r}\0" \
313 "net_nfs=" \
314 "run netload nfsargs addip addargs ; " \
315 "bootm ${kernel_addr_r}\0" \
316 "try_bootscript=" \
317 "mmc rescan;" \
318 "if test -e mmc 0:1 ${bootscript} ; then " \
319 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
320 "then ; " \
321 "echo Running bootscript... ; " \
322 "source ${kernel_addr_r} ; " \
323 "fi ; " \
324 "fi\0"
325
326 #endif /* __M53EVK_CONFIG_H__ */