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1 /*
2 * Aries M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
10
11 #define CONFIG_MXC_GPIO
12
13 #include <asm/arch/imx-regs.h>
14
15 #define CONFIG_REVISION_TAG
16 #define CONFIG_SYS_FSL_CLK
17
18 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
19
20 /*
21 * Memory configurations
22 */
23 #define CONFIG_NR_DRAM_BANKS 2
24 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
25 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
26 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
27 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
28 #define PHYS_SDRAM_SIZE (gd->ram_size)
29 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
30 #define CONFIG_SYS_MEMTEST_START 0x70000000
31 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
32
33 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
34 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
35 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
36
37 #define CONFIG_SYS_INIT_SP_OFFSET \
38 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
39 #define CONFIG_SYS_INIT_SP_ADDR \
40 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
41
42 #define CONFIG_SYS_TEXT_BASE 0x71000000
43
44 /*
45 * U-Boot general configurations
46 */
47 #define CONFIG_SYS_LONGHELP
48 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
49 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
50 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
51 /* Boot argument buffer size */
52 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
53 #define CONFIG_CMDLINE_EDITING /* Command history etc */
54
55 /*
56 * Serial Driver
57 */
58 #define CONFIG_MXC_UART
59 #define CONFIG_MXC_UART_BASE UART2_BASE
60 #define CONFIG_CONS_INDEX 1
61
62 /*
63 * MMC Driver
64 */
65 #ifdef CONFIG_CMD_MMC
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
68 #define CONFIG_SYS_FSL_ESDHC_NUM 1
69 #endif
70
71 /*
72 * NAND
73 */
74 #define CONFIG_ENV_SIZE (16 * 1024)
75 #ifdef CONFIG_CMD_NAND
76 #define CONFIG_SYS_MAX_NAND_DEVICE 1
77 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
78 #define CONFIG_NAND_MXC
79 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
80 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
81 #define CONFIG_SYS_NAND_LARGEPAGE
82 #define CONFIG_MXC_NAND_HWECC
83 #define CONFIG_SYS_NAND_USE_FLASH_BBT
84
85 /* Environment is in NAND */
86 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
87 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
88 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
89 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
90 #define CONFIG_ENV_OFFSET_REDUND \
91 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
92
93 #define CONFIG_MTD_DEVICE
94 #define CONFIG_MTD_PARTITIONS
95 #define MTDIDS_DEFAULT "nand0=mxc_nand"
96 #define MTDPARTS_DEFAULT \
97 "mtdparts=mxc_nand:" \
98 "1024k(u-boot)," \
99 "512k(env1)," \
100 "512k(env2)," \
101 "14m(boot)," \
102 "240m(data)," \
103 "-@2048k(UBI)"
104 #endif
105
106 /*
107 * Ethernet on SOC (FEC)
108 */
109 #ifdef CONFIG_CMD_NET
110 #define CONFIG_FEC_MXC
111 #define IMX_FEC_BASE FEC_BASE_ADDR
112 #define CONFIG_FEC_MXC_PHYADDR 0x0
113 #define CONFIG_MII
114 #define CONFIG_DISCOVER_PHY
115 #define CONFIG_FEC_XCV_TYPE RMII
116 #define CONFIG_ETHPRIME "FEC0"
117 #endif
118
119 /*
120 * I2C
121 */
122 #ifdef CONFIG_CMD_I2C
123 #define CONFIG_SYS_I2C
124 #define CONFIG_SYS_I2C_MXC
125 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
126 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
127 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
128 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
129 #endif
130
131 /*
132 * RTC
133 */
134 #ifdef CONFIG_CMD_DATE
135 #define CONFIG_RTC_M41T62
136 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
137 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
138 #endif
139
140 /*
141 * USB
142 */
143 #ifdef CONFIG_CMD_USB
144 #define CONFIG_USB_EHCI_MX5
145 #define CONFIG_MXC_USB_PORT 1
146 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
147 #define CONFIG_MXC_USB_FLAGS 0
148 #endif
149
150 /*
151 * SATA
152 */
153 #ifdef CONFIG_CMD_SATA
154 #define CONFIG_DWC_AHSATA
155 #define CONFIG_SYS_SATA_MAX_DEVICE 1
156 #define CONFIG_DWC_AHSATA_PORT_ID 0
157 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
158 #define CONFIG_LBA48
159 #define CONFIG_LIBATA
160 #endif
161
162 /*
163 * LCD
164 */
165 #ifdef CONFIG_VIDEO
166 #define CONFIG_VIDEO_IPUV3
167 #define CONFIG_VIDEO_BMP_RLE8
168 #define CONFIG_VIDEO_BMP_GZIP
169 #define CONFIG_SPLASH_SCREEN
170 #define CONFIG_SPLASHIMAGE_GUARD
171 #define CONFIG_SPLASH_SCREEN_ALIGN
172 #define CONFIG_BMP_16BPP
173 #define CONFIG_VIDEO_LOGO
174 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
175 #define CONFIG_IPUV3_CLK 200000000
176 #endif
177
178 /*
179 * Boot Linux
180 */
181 #define CONFIG_CMDLINE_TAG
182 #define CONFIG_INITRD_TAG
183 #define CONFIG_REVISION_TAG
184 #define CONFIG_SETUP_MEMORY_TAGS
185 #define CONFIG_BOOTFILE "fitImage"
186 #define CONFIG_LOADADDR 0x70800000
187 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
188 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
189
190 /*
191 * NAND SPL
192 */
193 #define CONFIG_SPL_FRAMEWORK
194 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
195 #define CONFIG_SPL_TEXT_BASE 0x70008000
196 #define CONFIG_SPL_PAD_TO 0x8000
197 #define CONFIG_SPL_STACK 0x70004000
198
199 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
200 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
201 #define CONFIG_SYS_NAND_OOBSIZE 64
202 #define CONFIG_SYS_NAND_PAGE_COUNT 64
203 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
204 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
205
206 /*
207 * Extra Environments
208 */
209 #define CONFIG_PREBOOT "run try_bootscript"
210 #define CONFIG_HOSTNAME m53evk
211
212 #define CONFIG_EXTRA_ENV_SETTINGS \
213 "consdev=ttymxc1\0" \
214 "baudrate=115200\0" \
215 "bootscript=boot.scr\0" \
216 "bootdev=/dev/mmcblk0p1\0" \
217 "rootdev=/dev/mmcblk0p2\0" \
218 "netdev=eth0\0" \
219 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
220 "kernel_addr_r=0x72000000\0" \
221 "addcons=" \
222 "setenv bootargs ${bootargs} " \
223 "console=${consdev},${baudrate}\0" \
224 "addip=" \
225 "setenv bootargs ${bootargs} " \
226 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
227 "${netmask}:${hostname}:${netdev}:off\0" \
228 "addmisc=" \
229 "setenv bootargs ${bootargs} ${miscargs}\0" \
230 "adddfltmtd=" \
231 "if test \"x${mtdparts}\" == \"x\" ; then " \
232 "mtdparts default ; " \
233 "fi\0" \
234 "addmtd=" \
235 "run adddfltmtd ; " \
236 "setenv bootargs ${bootargs} ${mtdparts}\0" \
237 "addargs=run addcons addmtd addmisc\0" \
238 "mmcload=" \
239 "mmc rescan ; " \
240 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
241 "ubiload=" \
242 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
243 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
244 "netload=" \
245 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
246 "miscargs=nohlt panic=1\0" \
247 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
248 "ubiargs=" \
249 "setenv bootargs ubi.mtd=5 " \
250 "root=ubi0:rootfs rootfstype=ubifs\0" \
251 "nfsargs=" \
252 "setenv bootargs root=/dev/nfs rw " \
253 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
254 "mmc_mmc=" \
255 "run mmcload mmcargs addargs ; " \
256 "bootm ${kernel_addr_r}\0" \
257 "mmc_ubi=" \
258 "run mmcload ubiargs addargs ; " \
259 "bootm ${kernel_addr_r}\0" \
260 "mmc_nfs=" \
261 "run mmcload nfsargs addip addargs ; " \
262 "bootm ${kernel_addr_r}\0" \
263 "ubi_mmc=" \
264 "run ubiload mmcargs addargs ; " \
265 "bootm ${kernel_addr_r}\0" \
266 "ubi_ubi=" \
267 "run ubiload ubiargs addargs ; " \
268 "bootm ${kernel_addr_r}\0" \
269 "ubi_nfs=" \
270 "run ubiload nfsargs addip addargs ; " \
271 "bootm ${kernel_addr_r}\0" \
272 "net_mmc=" \
273 "run netload mmcargs addargs ; " \
274 "bootm ${kernel_addr_r}\0" \
275 "net_ubi=" \
276 "run netload ubiargs addargs ; " \
277 "bootm ${kernel_addr_r}\0" \
278 "net_nfs=" \
279 "run netload nfsargs addip addargs ; " \
280 "bootm ${kernel_addr_r}\0" \
281 "try_bootscript=" \
282 "mmc rescan;" \
283 "if test -e mmc 0:1 ${bootscript} ; then " \
284 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
285 "then ; " \
286 "echo Running bootscript... ; " \
287 "source ${kernel_addr_r} ; " \
288 "fi ; " \
289 "fi\0"
290
291 #endif /* __M53EVK_CONFIG_H__ */