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1 /*
2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
10
11 #define CONFIG_MX53
12 #define CONFIG_MXC_GPIO
13
14 #include <asm/arch/imx-regs.h>
15
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_BOARD_EARLY_INIT_F
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_NO_FLASH
20 #define CONFIG_SYS_FSL_CLK
21
22 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
23
24 /*
25 * U-Boot Commands
26 */
27 #define CONFIG_DISPLAY_BOARDINFO
28 #define CONFIG_DOS_PARTITION
29 #define CONFIG_FAT_WRITE
30
31 #define CONFIG_CMD_ASKENV
32 #define CONFIG_CMD_BMP
33 #define CONFIG_CMD_DATE
34 #define CONFIG_CMD_DHCP
35 #define CONFIG_CMD_EXT4
36 #define CONFIG_CMD_EXT4_WRITE
37 #define CONFIG_CMD_FAT
38 #define CONFIG_CMD_FS_GENERIC
39 #define CONFIG_CMD_GREPENV
40 #define CONFIG_CMD_I2C
41 #define CONFIG_CMD_MII
42 #define CONFIG_CMD_MMC
43 #define CONFIG_CMD_NAND
44 #define CONFIG_CMD_NAND_TRIMFFS
45 #define CONFIG_CMD_PING
46 #define CONFIG_CMD_SATA
47 #define CONFIG_CMD_USB
48 #define CONFIG_VIDEO
49
50
51 /*
52 * Memory configurations
53 */
54 #define CONFIG_NR_DRAM_BANKS 2
55 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
56 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
57 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
58 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
59 #define PHYS_SDRAM_SIZE (gd->ram_size)
60 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
61 #define CONFIG_SYS_MEMTEST_START 0x70000000
62 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
63
64 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
65 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
66 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
67
68 #define CONFIG_SYS_INIT_SP_OFFSET \
69 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
70 #define CONFIG_SYS_INIT_SP_ADDR \
71 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
72
73 #define CONFIG_SYS_TEXT_BASE 0x71000000
74
75 /*
76 * U-Boot general configurations
77 */
78 #define CONFIG_SYS_LONGHELP
79 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
80 #define CONFIG_SYS_PBSIZE \
81 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
82 /* Print buffer size */
83 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
84 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
85 /* Boot argument buffer size */
86 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
87 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
88 #define CONFIG_CMDLINE_EDITING /* Command history etc */
89 #define CONFIG_SYS_HUSH_PARSER
90
91 /*
92 * Serial Driver
93 */
94 #define CONFIG_MXC_UART
95 #define CONFIG_MXC_UART_BASE UART2_BASE
96 #define CONFIG_CONS_INDEX 1
97 #define CONFIG_BAUDRATE 115200
98
99 /*
100 * MMC Driver
101 */
102 #ifdef CONFIG_CMD_MMC
103 #define CONFIG_MMC
104 #define CONFIG_GENERIC_MMC
105 #define CONFIG_FSL_ESDHC
106 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
107 #define CONFIG_SYS_FSL_ESDHC_NUM 1
108 #endif
109
110 /*
111 * NAND
112 */
113 #define CONFIG_ENV_SIZE (16 * 1024)
114 #ifdef CONFIG_CMD_NAND
115 #define CONFIG_SYS_MAX_NAND_DEVICE 1
116 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
117 #define CONFIG_NAND_MXC
118 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
119 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
120 #define CONFIG_SYS_NAND_LARGEPAGE
121 #define CONFIG_MXC_NAND_HWECC
122 #define CONFIG_SYS_NAND_USE_FLASH_BBT
123
124 /* Environment is in NAND */
125 #define CONFIG_ENV_IS_IN_NAND
126 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
127 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
128 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
129 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
130 #define CONFIG_ENV_OFFSET_REDUND \
131 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
132
133 #define CONFIG_CMD_UBI
134 #define CONFIG_CMD_UBIFS
135 #define CONFIG_CMD_MTDPARTS
136 #define CONFIG_RBTREE
137 #define CONFIG_LZO
138 #define CONFIG_MTD_DEVICE
139 #define CONFIG_MTD_PARTITIONS
140 #define MTDIDS_DEFAULT "nand0=mxc_nand"
141 #define MTDPARTS_DEFAULT \
142 "mtdparts=mxc_nand:" \
143 "1024k(u-boot)," \
144 "512k(env1)," \
145 "512k(env2)," \
146 "14m(boot)," \
147 "240m(data)," \
148 "-@2048k(UBI)"
149 #else
150 #define CONFIG_ENV_IS_NOWHERE
151 #endif
152
153 /*
154 * Ethernet on SOC (FEC)
155 */
156 #ifdef CONFIG_CMD_NET
157 #define CONFIG_FEC_MXC
158 #define IMX_FEC_BASE FEC_BASE_ADDR
159 #define CONFIG_FEC_MXC_PHYADDR 0x0
160 #define CONFIG_MII
161 #define CONFIG_DISCOVER_PHY
162 #define CONFIG_FEC_XCV_TYPE RMII
163 #define CONFIG_PHYLIB
164 #define CONFIG_PHY_MICREL
165 #define CONFIG_ETHPRIME "FEC0"
166 #endif
167
168 /*
169 * I2C
170 */
171 #ifdef CONFIG_CMD_I2C
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_I2C_MXC
174 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
175 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
176 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
177 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
178 #endif
179
180 /*
181 * RTC
182 */
183 #ifdef CONFIG_CMD_DATE
184 #define CONFIG_RTC_M41T62
185 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
186 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
187 #endif
188
189 /*
190 * USB
191 */
192 #ifdef CONFIG_CMD_USB
193 #define CONFIG_USB_EHCI
194 #define CONFIG_USB_EHCI_MX5
195 #define CONFIG_USB_STORAGE
196 #define CONFIG_USB_HOST_ETHER
197 #define CONFIG_USB_ETHER_ASIX
198 #define CONFIG_USB_ETHER_MCS7830
199 #define CONFIG_USB_ETHER_SMSC95XX
200 #define CONFIG_MXC_USB_PORT 1
201 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
202 #define CONFIG_MXC_USB_FLAGS 0
203 #endif
204
205 /*
206 * SATA
207 */
208 #ifdef CONFIG_CMD_SATA
209 #define CONFIG_DWC_AHSATA
210 #define CONFIG_SYS_SATA_MAX_DEVICE 1
211 #define CONFIG_DWC_AHSATA_PORT_ID 0
212 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
213 #define CONFIG_LBA48
214 #define CONFIG_LIBATA
215 #endif
216
217 /*
218 * LCD
219 */
220 #ifdef CONFIG_VIDEO
221 #define CONFIG_VIDEO_IPUV3
222 #define CONFIG_CFB_CONSOLE
223 #define CONFIG_VGA_AS_SINGLE_DEVICE
224 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
225 #define CONFIG_VIDEO_BMP_RLE8
226 #define CONFIG_VIDEO_BMP_GZIP
227 #define CONFIG_SPLASH_SCREEN
228 #define CONFIG_SPLASHIMAGE_GUARD
229 #define CONFIG_SPLASH_SCREEN_ALIGN
230 #define CONFIG_BMP_16BPP
231 #define CONFIG_VIDEO_LOGO
232 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
233 #define CONFIG_IPUV3_CLK 200000000
234 #endif
235
236 /*
237 * Boot Linux
238 */
239 #define CONFIG_CMDLINE_TAG
240 #define CONFIG_INITRD_TAG
241 #define CONFIG_REVISION_TAG
242 #define CONFIG_SETUP_MEMORY_TAGS
243 #define CONFIG_BOOTDELAY 3
244 #define CONFIG_BOOTFILE "fitImage"
245 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
246 #define CONFIG_LOADADDR 0x70800000
247 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
248 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
249
250 /*
251 * NAND SPL
252 */
253 #define CONFIG_SPL_FRAMEWORK
254 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
255 #define CONFIG_SPL_BOARD_INIT
256 #define CONFIG_SPL_TEXT_BASE 0x70008000
257 #define CONFIG_SPL_PAD_TO 0x8000
258 #define CONFIG_SPL_STACK 0x70004000
259 #define CONFIG_SPL_GPIO_SUPPORT
260 #define CONFIG_SPL_LIBCOMMON_SUPPORT
261 #define CONFIG_SPL_LIBGENERIC_SUPPORT
262 #define CONFIG_SPL_NAND_SUPPORT
263 #define CONFIG_SPL_SERIAL_SUPPORT
264
265 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
266 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
267 #define CONFIG_SYS_NAND_OOBSIZE 64
268 #define CONFIG_SYS_NAND_PAGE_COUNT 64
269 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
270 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
271
272 /*
273 * Extra Environments
274 */
275 #define CONFIG_PREBOOT "run try_bootscript"
276 #define CONFIG_HOSTNAME m53evk
277
278 #define CONFIG_EXTRA_ENV_SETTINGS \
279 "consdev=ttymxc1\0" \
280 "baudrate=115200\0" \
281 "bootscript=boot.scr\0" \
282 "bootdev=/dev/mmcblk0p1\0" \
283 "rootdev=/dev/mmcblk0p2\0" \
284 "netdev=eth0\0" \
285 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
286 "kernel_addr_r=0x72000000\0" \
287 "addcons=" \
288 "setenv bootargs ${bootargs} " \
289 "console=${consdev},${baudrate}\0" \
290 "addip=" \
291 "setenv bootargs ${bootargs} " \
292 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
293 "${netmask}:${hostname}:${netdev}:off\0" \
294 "addmisc=" \
295 "setenv bootargs ${bootargs} ${miscargs}\0" \
296 "adddfltmtd=" \
297 "if test \"x${mtdparts}\" == \"x\" ; then " \
298 "mtdparts default ; " \
299 "fi\0" \
300 "addmtd=" \
301 "run adddfltmtd ; " \
302 "setenv bootargs ${bootargs} ${mtdparts}\0" \
303 "addargs=run addcons addmtd addmisc\0" \
304 "mmcload=" \
305 "mmc rescan ; " \
306 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
307 "ubiload=" \
308 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
309 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
310 "netload=" \
311 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
312 "miscargs=nohlt panic=1\0" \
313 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
314 "ubiargs=" \
315 "setenv bootargs ubi.mtd=5 " \
316 "root=ubi0:rootfs rootfstype=ubifs\0" \
317 "nfsargs=" \
318 "setenv bootargs root=/dev/nfs rw " \
319 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
320 "mmc_mmc=" \
321 "run mmcload mmcargs addargs ; " \
322 "bootm ${kernel_addr_r}\0" \
323 "mmc_ubi=" \
324 "run mmcload ubiargs addargs ; " \
325 "bootm ${kernel_addr_r}\0" \
326 "mmc_nfs=" \
327 "run mmcload nfsargs addip addargs ; " \
328 "bootm ${kernel_addr_r}\0" \
329 "ubi_mmc=" \
330 "run ubiload mmcargs addargs ; " \
331 "bootm ${kernel_addr_r}\0" \
332 "ubi_ubi=" \
333 "run ubiload ubiargs addargs ; " \
334 "bootm ${kernel_addr_r}\0" \
335 "ubi_nfs=" \
336 "run ubiload nfsargs addip addargs ; " \
337 "bootm ${kernel_addr_r}\0" \
338 "net_mmc=" \
339 "run netload mmcargs addargs ; " \
340 "bootm ${kernel_addr_r}\0" \
341 "net_ubi=" \
342 "run netload ubiargs addargs ; " \
343 "bootm ${kernel_addr_r}\0" \
344 "net_nfs=" \
345 "run netload nfsargs addip addargs ; " \
346 "bootm ${kernel_addr_r}\0" \
347 "try_bootscript=" \
348 "mmc rescan;" \
349 "if test -e mmc 0:1 ${bootscript} ; then " \
350 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
351 "then ; " \
352 "echo Running bootscript... ; " \
353 "source ${kernel_addr_r} ; " \
354 "fi ; " \
355 "fi\0"
356
357 #endif /* __M53EVK_CONFIG_H__ */