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1 /*
2 * Copyright (C) 2016-2017
3 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10
11 #include <config_distro_defaults.h>
12 #include "mx6_common.h"
13
14 #define CONFIG_SPL_LIBCOMMON_SUPPORT
15 #include "imx6_spl.h"
16
17 #define CONFIG_SPL_BOARD_INIT
18 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
19 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)
20 #define CONFIG_SPL_OS_BOOT
21 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000)
22 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000)
23 #define CONFIG_SYS_FDT_SIZE (48 * SZ_1K)
24 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
25
26 /*
27 * Below defines are set but NOT really used since we by
28 * design force U-Boot run when we boot in development
29 * mode from SD card (SD2)
30 */
31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800)
32 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80)
33 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
34 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
35 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6q-mccmon.dtb"
36
37 /* Size of malloc() pool */
38 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
39
40 #define CONFIG_BOARD_EARLY_INIT_F
41 #define CONFIG_BOARD_LATE_INIT
42
43 #define CONFIG_MXC_UART
44 #define CONFIG_MXC_UART_BASE UART1_BASE
45
46 #define CONFIG_SYS_MEMTEST_START 0x10000000
47 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
48
49 #define CONFIG_MXC_SPI
50 #define CONFIG_SF_DEFAULT_BUS 2
51 #define CONFIG_SF_DEFAULT_CS 0
52 #define CONFIG_SF_DEFAULT_SPEED 25000000
53 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
54
55 /* I2C Configs */
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
59 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60 #define CONFIG_SYS_I2C_SPEED 100000
61
62 /* MMC Configuration */
63 #define CONFIG_SYS_FSL_USDHC_NUM 2
64 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
65
66 /* NOR 16-bit mode */
67 #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR
68 #define CONFIG_SYS_FLASH_PROTECTION
69 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
70 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
71 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
72 #define CONFIG_SYS_FLASH_EMPTY_INFO
73 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */
74 #define CONFIG_FLASH_VERIFY
75
76 /* NOR Flash MTD */
77 #define CONFIG_FLASH_CFI_DRIVER
78 #define CONFIG_FLASH_CFI_MTD
79 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
80 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
81 #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) }
82
83 /* MTD support */
84 #define CONFIG_CMD_MTDPARTS
85 #define CONFIG_MTD_DEVICE
86 #define CONFIG_MTD_PARTITIONS
87
88 #define MTDIDS_DEFAULT "nor0=8000000.nor"
89 #define MTDPARTS_DEFAULT \
90 "mtdparts=8000000.nor:" \
91 "32m@0x0(mccmon6-image.nor)," \
92 "256k@0x40000(u-boot-env.nor)," \
93 "1m@0x80000(u-boot.nor)," \
94 "8m@0x180000(kernel.nor)," \
95 "8m@0x980000(swupdate-kernel.nor)," \
96 "8m@0x1180000(swupdate-rootfs.nor)," \
97 "128k@0x1980000(kernel-dtb.nor)," \
98 "128k@0x19C0000(swupdate-kernel-dtb.nor)"
99
100 /* USB Configs */
101 #define CONFIG_USB_EHCI
102 #define CONFIG_USB_EHCI_MX6
103 #define CONFIG_USB_STORAGE
104 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
105 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
106 #define CONFIG_MXC_USB_FLAGS 0
107
108 /* Ethernet Configuration */
109 #define CONFIG_FEC_MXC
110 #define CONFIG_MII
111 #define IMX_FEC_BASE ENET_BASE_ADDR
112 #define CONFIG_FEC_XCV_TYPE RGMII
113 #define CONFIG_ETHPRIME "FEC"
114 #define CONFIG_FEC_MXC_PHYADDR 1
115 #define CONFIG_PHYLIB
116 #define CONFIG_PHY_MICREL
117 #define CONFIG_PHY_MICREL_KSZ9031
118
119 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
120 #define CONFIG_EXTRA_ENV_SETTINGS \
121 "console=ttymxc0,115200\0" \
122 "fdtfile=imx6q-mccmon6.dtb\0" \
123 "fdt_high=0xffffffff\0" \
124 "initrd_high=0xffffffff\0" \
125 "boot_os=yes\0" \
126 "download_kernel=" \
127 "tftpboot ${kernel_addr} ${kernel_file};" \
128 "tftpboot ${fdt_addr} ${fdtfile};\0" \
129 "get_boot_medium=" \
130 "setenv boot_medium nor;" \
131 "setexpr.l _src_sbmr1 *0x020d8004;" \
132 "setexpr _b_medium ${_src_sbmr1} '&' 0x00000040;" \
133 "if test ${_b_medium} = 40; then " \
134 "setenv boot_medium sdcard;" \
135 "fi\0" \
136 "kernel_file=uImage\0" \
137 "load_kernel=" \
138 "load mmc ${bootdev}:${bootpart} ${kernel_addr} uImage;" \
139 "load mmc ${bootdev}:${bootpart} ${fdt_addr} ${fdtfile};\0" \
140 "boot_sd=" \
141 "echo '#######################';" \
142 "echo '# Factory SDcard Boot #';" \
143 "echo '#######################';" \
144 "setenv mmcdev 1;" \
145 "setenv mmcfactorydev 0;" \
146 "setenv mmcfactorypart 1;" \
147 "run factory_flash_img;\0" \
148 "boot_nor=" \
149 "setenv kernelnor 0x08180000;" \
150 "setenv dtbnor 0x09980000;" \
151 "setenv bootargs console=${console} quiet " \
152 ""MTDPARTS_DEFAULT" " \
153 "root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \
154 "cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \
155 "bootm ${kernelnor} - ${dtbloadaddr};\0" \
156 "boot_recovery=" \
157 "echo '#######################';" \
158 "echo '# RECOVERY SWU Boot #';" \
159 "echo '#######################';" \
160 "setenv rootfsloadaddr 0x13000000;" \
161 "setenv swukernelnor 0x08980000;" \
162 "setenv swurootfsnor 0x09180000;" \
163 "setenv swudtbnor 0x099A0000;" \
164 "setenv bootargs console=${console} " \
165 ""MTDPARTS_DEFAULT" " \
166 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
167 ":${hostname}::off root=/dev/ram rw;" \
168 "cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \
169 "cp.l ${swudtbnor} ${dtbloadaddr} 0x8000;" \
170 "bootm ${swukernelnor} ${rootfsloadaddr} ${dtbloadaddr};\0" \
171 "boot_tftp=" \
172 "echo '#######################';" \
173 "echo '# TFTP Boot #';" \
174 "echo '#######################';" \
175 "if run download_kernel; then " \
176 "setenv bootargs console=${console} " \
177 "root=/dev/mmcblk0p2 rootwait;" \
178 "bootm ${kernel_addr} - ${fdt_addr};" \
179 "fi\0" \
180 "bootcmd=" \
181 "if test -n ${recovery_status}; then " \
182 "run boot_recovery;" \
183 "else " \
184 "if test ! -n ${boot_medium}; then " \
185 "run get_boot_medium;" \
186 "if test ${boot_medium} = sdcard; then " \
187 "run boot_sd;" \
188 "else " \
189 "run boot_nor;" \
190 "fi;" \
191 "else " \
192 "if test ${boot_medium} = tftp; then " \
193 "run boot_tftp;" \
194 "fi;" \
195 "fi;" \
196 "fi\0" \
197 "mtdparts=" MTDPARTS_DEFAULT "\0" \
198 "fdt_addr=0x18000000\0" \
199 "bootdev=1\0" \
200 "bootpart=1\0" \
201 "kernel_addr=" __stringify(CONFIG_LOADADDR) "\0" \
202 "netdev=eth0\0" \
203 "load_addr=0x11000000\0" \
204 "dtbloadaddr=0x12000000\0" \
205 "uboot_file=u-boot.img\0" \
206 "SPL_file=SPL\0" \
207 "load_uboot=tftp ${load_addr} ${uboot_file}\0" \
208 "nor_img_addr=0x11000000\0" \
209 "nor_img_file=core-image-lwn-mccmon6.nor\0" \
210 "emmc_img_file=core-image-lwn-mccmon6.ext4\0" \
211 "nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \
212 "nor_img_size=0x02000000\0" \
213 "factory_script_file=factory.scr\0" \
214 "factory_load_script=" \
215 "if test -e mmc ${mmcdev}:${mmcfactorypart} " \
216 "${factory_script_file}; then " \
217 "load mmc ${mmcdev}:${mmcfactorypart} " \
218 "${loadaddr} ${factory_script_file};" \
219 "fi\0" \
220 "factory_script=echo Running factory script from mmc${mmcdev} ...; " \
221 "source ${loadaddr}\0" \
222 "factory_flash_img="\
223 "echo 'Flash mccmon6 with factory images'; " \
224 "if run factory_load_script; then " \
225 "run factory_script;" \
226 "else " \
227 "echo No factory script: ${factory_script_file} found on " \
228 "device ${mmcdev};" \
229 "run factory_nor_img;" \
230 "run factory_eMMC_img;" \
231 "fi\0" \
232 "factory_eMMC_img="\
233 "echo 'Update mccmon6 eMMC image'; " \
234 "if load mmc ${mmcdev}:${mmcfactorypart} " \
235 "${loadaddr} ${emmc_img_file}; then " \
236 "setexpr fw_sz ${filesize} / 0x200;" \
237 "setexpr fw_sz ${fw_sz} + 1;" \
238 "mmc dev ${mmcfactorydev};" \
239 "mmc write ${loadaddr} 0x0 ${fw_sz};" \
240 "fi\0" \
241 "factory_nor_img="\
242 "echo 'Update mccmon6 NOR image'; " \
243 "if load mmc ${mmcdev}:${mmcfactorypart} " \
244 "${nor_img_addr} ${nor_img_file}; then " \
245 "run nor_update;" \
246 "fi\0" \
247 "nor_update=" \
248 "protect off ${nor_bank_start} +${nor_img_size};" \
249 "erase ${nor_bank_start} +${nor_img_size};" \
250 "setexpr nor_img_size ${nor_img_size} / 4; " \
251 "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \
252 "tftp_nor_uboot="\
253 "echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \
254 "setenv nor_img_file u-boot.img; " \
255 "setenv nor_img_size 0x80000; " \
256 "setenv nor_bank_start 0x08080000; " \
257 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
258 "run nor_update;" \
259 "fi\0" \
260 "tftp_nor_uImg="\
261 "echo 'Update mccmon6 NOR uImage via TFTP'; " \
262 "setenv nor_img_file uImage; " \
263 "setenv nor_img_size 0x500000; " \
264 "setenv nor_bank_start 0x08180000; " \
265 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
266 "run nor_update;" \
267 "fi\0" \
268 "tftp_nor_img="\
269 "echo 'Update mccmon6 NOR image via TFTP'; " \
270 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
271 "run nor_update;" \
272 "fi\0" \
273 "tftp_nor_SPL="\
274 "if tftp ${load_addr} SPL_padded; then " \
275 "erase 0x08000000 +0x20000;" \
276 "cp.b ${load_addr} 0x08000000 0x20000;" \
277 "fi;\0" \
278 "tftp_sd_SPL="\
279 "if mmc dev 1; then " \
280 "if tftp ${load_addr} ${SPL_file}; then " \
281 "setexpr fw_sz ${filesize} / 0x200; " \
282 "setexpr fw_sz ${fw_sz} + 1; " \
283 "mmc write ${load_addr} 0x2 ${fw_sz};" \
284 "fi;" \
285 "fi;\0" \
286 "tftp_sd_uboot="\
287 "if mmc dev 1; then " \
288 "if run load_uboot; then " \
289 "setexpr fw_sz ${filesize} / 0x200; " \
290 "setexpr fw_sz ${fw_sz} + 1; " \
291 "mmc write ${load_addr} 0x8A ${fw_sz};" \
292 "fi;" \
293 "fi;\0"
294
295 /* Physical Memory Map */
296 #define CONFIG_NR_DRAM_BANKS 1
297 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
298
299 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
300 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
301 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
302
303 #define CONFIG_SYS_INIT_SP_OFFSET \
304 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
305 #define CONFIG_SYS_INIT_SP_ADDR \
306 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
307
308 /* Environment organization */
309 #define CONFIG_ENV_SIZE (SZ_128K)
310
311 /* Envs are stored in NOR flash */
312 #define CONFIG_ENV_IS_IN_FLASH
313 #define CONFIG_ENV_SECT_SIZE (SZ_128K)
314 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
315
316 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
317 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + 0x60000)
318 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
319
320 #endif /* __CONFIG_H * */