]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/mcx.h
Add GPL-2.0+ SPDX-License-Identifier to source files
[people/ms/u-boot.git] / include / configs / mcx.h
1 /*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 /*
13 * High Level Configuration Options
14 */
15 #define CONFIG_OMAP /* in a TI OMAP core */
16 #define CONFIG_OMAP34XX /* which is a 34XX */
17 #define CONFIG_OMAP3_MCX /* working with mcx */
18 #define CONFIG_OMAP_GPIO
19
20 #define MACH_TYPE_MCX 3656
21 #define CONFIG_MACH_TYPE MACH_TYPE_MCX
22 #define CONFIG_BOARD_LATE_INIT
23
24 #define CONFIG_SYS_CACHELINE_SIZE 64
25
26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
27
28 #include <asm/arch/cpu.h> /* get chip and board defs */
29 #include <asm/arch/omap3.h>
30
31 #define CONFIG_OF_LIBFDT
32 #define CONFIG_FIT
33
34 /*
35 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
36 * and older u-boot.bin with the new U-Boot SPL.
37 */
38 #define CONFIG_SYS_TEXT_BASE 0x80008000
39
40 /*
41 * Display CPU and Board information
42 */
43 #define CONFIG_DISPLAY_CPUINFO
44 #define CONFIG_DISPLAY_BOARDINFO
45
46 /* Clock Defines */
47 #define V_OSCK 26000000 /* Clock output from T2 */
48 #define V_SCLK (V_OSCK >> 1)
49
50 #define CONFIG_MISC_INIT_R
51
52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS
54 #define CONFIG_INITRD_TAG
55 #define CONFIG_REVISION_TAG
56
57 /*
58 * Size of malloc() pool
59 */
60 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
61 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
62 /*
63 * DDR related
64 */
65 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
66
67 /*
68 * Hardware drivers
69 */
70
71 /*
72 * NS16550 Configuration
73 */
74 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
75
76 #define CONFIG_SYS_NS16550
77 #define CONFIG_SYS_NS16550_SERIAL
78 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
79 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
80
81 /*
82 * select serial console configuration
83 */
84 #define CONFIG_CONS_INDEX 3
85 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
86 #define CONFIG_SERIAL3 3 /* UART3 */
87
88 /* allow to overwrite serial and ethaddr */
89 #define CONFIG_ENV_OVERWRITE
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
92 115200}
93 #define CONFIG_MMC
94 #define CONFIG_OMAP_HSMMC
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_DOS_PARTITION
97
98 /* EHCI */
99 #define CONFIG_USB_STORAGE
100 #define CONFIG_OMAP3_GPIO_5
101 #define CONFIG_USB_EHCI
102 #define CONFIG_USB_EHCI_OMAP
103 #define CONFIG_USB_ULPI
104 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
105 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
106 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
107
108 /* commands to include */
109 #include <config_cmd_default.h>
110
111 #define CONFIG_CMD_EXT2 /* EXT2 Support */
112 #define CONFIG_CMD_FAT /* FAT support */
113 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
114
115 #define CONFIG_CMD_DATE
116 #define CONFIG_CMD_I2C /* I2C serial bus support */
117 #define CONFIG_CMD_MMC /* MMC support */
118 #define CONFIG_CMD_FAT /* FAT support */
119 #define CONFIG_CMD_USB
120 #define CONFIG_CMD_NAND /* NAND support */
121 #define CONFIG_CMD_DHCP
122 #define CONFIG_CMD_PING
123 #define CONFIG_CMD_CACHE
124 #define CONFIG_CMD_UBI
125 #define CONFIG_CMD_UBIFS
126 #define CONFIG_RBTREE
127 #define CONFIG_LZO
128 #define CONFIG_MTD_PARTITIONS
129 #define CONFIG_MTD_DEVICE
130 #define CONFIG_CMD_MTDPARTS
131 #define CONFIG_CMD_GPIO
132
133 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
134 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
135 #undef CONFIG_CMD_IMI /* iminfo */
136 #undef CONFIG_CMD_IMLS /* List all found images */
137
138 #define CONFIG_SYS_NO_FLASH
139 #define CONFIG_HARD_I2C
140 #define CONFIG_SYS_I2C_SPEED 100000
141 #define CONFIG_SYS_I2C_SLAVE 1
142 #define CONFIG_DRIVER_OMAP34XX_I2C
143
144 /* RTC */
145 #define CONFIG_RTC_DS1337
146 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
147
148 #define CONFIG_CMD_NET
149 #define CONFIG_CMD_MII
150 #define CONFIG_CMD_NFS
151 /*
152 * Board NAND Info.
153 */
154 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
155 /* to access nand */
156 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
157 /* to access */
158 /* nand at CS0 */
159
160 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
161 /* NAND devices */
162 #define CONFIG_JFFS2_NAND
163 /* nand device jffs2 lives on */
164 #define CONFIG_JFFS2_DEV "nand0"
165 /* start of jffs2 partition */
166 #define CONFIG_JFFS2_PART_OFFSET 0x680000
167 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
168
169 /* Environment information */
170 #define CONFIG_BOOTDELAY 3
171
172 #define CONFIG_BOOTFILE "uImage"
173
174 #define xstr(s) str(s)
175 #define str(s) #s
176
177 /* Setup MTD for NAND on the SOM */
178 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
179 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
180 "1m(u-boot),256k(env1)," \
181 "256k(env2),6m(kernel),6m(k_recovery)," \
182 "8m(fs_recovery),-(common_data)"
183
184 #define CONFIG_HOSTNAME mcx
185 #define CONFIG_EXTRA_ENV_SETTINGS \
186 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
187 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
188 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
189 "addfb=setenv bootargs ${bootargs} vram=6M " \
190 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
191 "addip_sta=setenv bootargs ${bootargs} " \
192 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
193 "${netmask}:${hostname}:eth0:off\0" \
194 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
195 "addip=if test -n ${ipdyn};then run addip_dyn;" \
196 "else run addip_sta;fi\0" \
197 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
198 "addtty=setenv bootargs ${bootargs} " \
199 "console=${consoledev},${baudrate}\0" \
200 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
201 "baudrate=115200\0" \
202 "consoledev=ttyO2\0" \
203 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
204 "loadaddr=0x82000000\0" \
205 "load=tftp ${loadaddr} ${u-boot}\0" \
206 "load_k=tftp ${loadaddr} ${bootfile}\0" \
207 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
208 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
209 "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \
210 "mmcargs=root=/dev/mmcblk0p2 rw " \
211 "rootfstype=ext3 rootwait\0" \
212 "mmcboot=echo Booting from mmc ...; " \
213 "run mmcargs; " \
214 "run addip addtty addmtd addfb addeth addmisc;" \
215 "run loaduimage; " \
216 "bootm ${loadaddr}\0" \
217 "net_nfs=run load_k; " \
218 "run nfsargs; " \
219 "run addip addtty addmtd addfb addeth addmisc;" \
220 "bootm ${loadaddr}\0" \
221 "nfsargs=setenv bootargs root=/dev/nfs rw " \
222 "nfsroot=${serverip}:${rootpath}\0" \
223 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \
224 "uboot_addr=0x80000\0" \
225 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
226 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
227 "updatemlo=nandecc hw;nand erase 0 20000;" \
228 "nand write ${loadaddr} 0 20000\0" \
229 "upd=if run load;then echo Updating u-boot;if run update;" \
230 "then echo U-Boot updated;" \
231 "else echo Error updating u-boot !;" \
232 "echo Board without bootloader !!;" \
233 "fi;" \
234 "else echo U-Boot not downloaded..exiting;fi\0" \
235 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
236 "bootscript=echo Running bootscript from mmc ...; " \
237 "source ${loadaddr}\0" \
238 "nandargs=setenv bootargs ubi.mtd=7 " \
239 "root=ubi0:rootfs rootfstype=ubifs\0" \
240 "nandboot=echo Booting from nand ...; " \
241 "run nandargs; " \
242 "ubi part nand0,4;" \
243 "ubi readvol ${loadaddr} kernel;" \
244 "run addtty addmtd addfb addeth addmisc;" \
245 "bootm ${loadaddr}\0" \
246 "preboot=ubi part nand0,7;" \
247 "ubi readvol ${loadaddr} splash;" \
248 "bmp display ${loadaddr};" \
249 "gpio set 55\0" \
250 "swupdate_args=setenv bootargs root=/dev/ram " \
251 "quiet loglevel=1 " \
252 "consoleblank=0 ${swupdate_misc}\0" \
253 "swupdate=echo Running Sw-Update...;" \
254 "if printenv mtdparts;then echo Starting SwUpdate...; " \
255 "else mtdparts default;fi; " \
256 "ubi part nand0,5;" \
257 "ubi readvol 0x82000000 kernel_recovery;" \
258 "ubi part nand0,6;" \
259 "ubi readvol 0x84000000 fs_recovery;" \
260 "run swupdate_args; " \
261 "setenv bootargs ${bootargs} " \
262 "${mtdparts} " \
263 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
264 "omapdss.def_disp=lcd;" \
265 "bootm 0x82000000 0x84000000\0"
266
267 #define CONFIG_BOOTCOMMAND \
268 "run nandboot"
269
270 #define CONFIG_AUTO_COMPLETE
271 #define CONFIG_CMDLINE_EDITING
272
273 /*
274 * Miscellaneous configurable options
275 */
276 #define V_PROMPT "mcx # "
277
278 #define CONFIG_SYS_LONGHELP /* undef to save memory */
279 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
280 #define CONFIG_SYS_PROMPT V_PROMPT
281 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
282 /* Print Buffer Size */
283 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
284 sizeof(CONFIG_SYS_PROMPT) + 16)
285 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
286 /* args */
287 /* Boot Argument Buffer Size */
288 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
289 /* memtest works on */
290 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
291 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
292 0x01F00000) /* 31MB */
293
294 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
295 /* address */
296 #define CONFIG_PREBOOT
297
298 /*
299 * AM3517 has 12 GP timers, they can be driven by the system clock
300 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
301 * This rate is divided by a local divisor.
302 */
303 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
304 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
305 #define CONFIG_SYS_HZ 1000
306
307 /*
308 * Physical Memory Map
309 */
310 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
311 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
312 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
313
314 /*
315 * FLASH and environment organization
316 */
317
318 /* **** PISMO SUPPORT *** */
319
320 /* Configure the PISMO */
321 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
322
323 #define CONFIG_NAND_OMAP_GPMC
324 #define GPMC_NAND_ECC_LP_x16_LAYOUT
325 #define CONFIG_ENV_IS_IN_NAND
326 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
327
328 /* Redundant Environment */
329 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
330 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
331 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
332 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
333 2 * CONFIG_SYS_ENV_SECT_SIZE)
334 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
335
336 /* Flash banks JFFS2 should use */
337 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
338 CONFIG_SYS_MAX_NAND_DEVICE)
339 #define CONFIG_SYS_JFFS2_MEM_NAND
340 /* use flash_info[2] */
341 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
342 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
343
344 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
345 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
346 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
347 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
348 CONFIG_SYS_INIT_RAM_SIZE - \
349 GENERATED_GBL_DATA_SIZE)
350
351 /* Defines for SPL */
352 #define CONFIG_SPL
353 #define CONFIG_SPL_FRAMEWORK
354 #define CONFIG_SPL_BOARD_INIT
355 #define CONFIG_SPL_NAND_SIMPLE
356 #define CONFIG_SPL_NAND_SOFTECC
357
358 #define CONFIG_SPL_LIBCOMMON_SUPPORT
359 #define CONFIG_SPL_LIBDISK_SUPPORT
360 #define CONFIG_SPL_I2C_SUPPORT
361 #define CONFIG_SPL_MMC_SUPPORT
362 #define CONFIG_SPL_FAT_SUPPORT
363 #define CONFIG_SPL_LIBGENERIC_SUPPORT
364 #define CONFIG_SPL_SERIAL_SUPPORT
365 #define CONFIG_SPL_POWER_SUPPORT
366 #define CONFIG_SPL_NAND_SUPPORT
367 #define CONFIG_SPL_NAND_BASE
368 #define CONFIG_SPL_NAND_DRIVERS
369 #define CONFIG_SPL_NAND_ECC
370 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
371
372 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
373 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
374 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
375
376 /* move malloc and bss high to prevent clashing with the main image */
377 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
378 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
379 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
380 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
381
382 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
383 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
384 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
385
386 /* NAND boot config */
387 #define CONFIG_SYS_NAND_PAGE_COUNT 64
388 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
389 #define CONFIG_SYS_NAND_OOBSIZE 64
390 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
391 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
392 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
393 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
394 48, 49, 50, 51, 52, 53, 54, 55,\
395 56, 57, 58, 59, 60, 61, 62, 63}
396 #define CONFIG_SYS_NAND_ECCSIZE 256
397 #define CONFIG_SYS_NAND_ECCBYTES 3
398
399 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
400
401 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
402
403 /*
404 * ethernet support
405 *
406 */
407 #if defined(CONFIG_CMD_NET)
408 #define CONFIG_DRIVER_TI_EMAC
409 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
410 #define CONFIG_MII
411 #define CONFIG_BOOTP_DEFAULT
412 #define CONFIG_BOOTP_DNS
413 #define CONFIG_BOOTP_DNS2
414 #define CONFIG_BOOTP_SEND_HOSTNAME
415 #define CONFIG_NET_RETRY_COUNT 10
416 #endif
417
418 #define CONFIG_VIDEO
419 #define CONFIG_CFB_CONSOLE
420 #define CONFIG_VGA_AS_SINGLE_DEVICE
421 #define CONFIG_SPLASH_SCREEN
422 #define CONFIG_VIDEO_BMP_RLE8
423 #define CONFIG_CMD_BMP
424 #define CONFIG_VIDEO_OMAP3
425 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
426
427 #endif /* __CONFIG_H */