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1 /*
2 * (C) Copyright 2007-2010 Michal Simek
3 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
13
14 /* MicroBlaze CPU */
15 #define MICROBLAZE_V5 1
16
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
19 #define FLASH
20 #undef SPIFLASH
21 #undef RAMENV /* hold environment in flash */
22 #else
23 #ifdef XILINX_SPI_FLASH_BASEADDR
24 #undef FLASH
25 #define SPIFLASH
26 #undef RAMENV /* hold environment in flash */
27 #else
28 #undef FLASH
29 #undef SPIFLASH
30 #define RAMENV /* hold environment in RAM */
31 #endif
32 #endif
33
34 /* uart */
35 #ifdef XILINX_UARTLITE_BASEADDR
36 # define CONFIG_XILINX_UARTLITE
37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0"
41 #elif XILINX_UART16550_BASEADDR
42 # define CONFIG_SYS_NS16550 1
43 # define CONFIG_SYS_NS16550_SERIAL
44 # if defined(__MICROBLAZEEL__)
45 # define CONFIG_SYS_NS16550_REG_SIZE -4
46 # else
47 # define CONFIG_SYS_NS16550_REG_SIZE 4
48 # endif
49 # define CONFIG_CONS_INDEX 1
50 # define CONFIG_SYS_NS16550_COM1 \
51 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
53 # define CONFIG_BAUDRATE 115200
54
55 /* The following table includes the supported baudrates */
56 # define CONFIG_SYS_BAUDRATE_TABLE \
57 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
58 # define CONSOLE_ARG "console=console=ttyS0,115200\0"
59 #else
60 # error Undefined uart
61 #endif
62
63 /* setting reset address */
64 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
65
66 /* ethernet */
67 #undef CONFIG_SYS_ENET
68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
69 # define CONFIG_XILINX_EMACLITE 1
70 # define CONFIG_SYS_ENET
71 #endif
72 #if defined(XILINX_LLTEMAC_BASEADDR)
73 # define CONFIG_XILINX_LL_TEMAC 1
74 # define CONFIG_SYS_ENET
75 #endif
76 #if defined(XILINX_AXIEMAC_BASEADDR)
77 # define CONFIG_XILINX_AXIEMAC 1
78 # define CONFIG_SYS_ENET
79 #endif
80
81 #undef ET_DEBUG
82
83 /* gpio */
84 #ifdef XILINX_GPIO_BASEADDR
85 # define CONFIG_XILINX_GPIO
86 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
87 #endif
88
89 /* interrupt controller */
90 #ifdef XILINX_INTC_BASEADDR
91 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
92 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
93 #endif
94
95 /* timer */
96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
97 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
98 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
99 #endif
100
101 /* watchdog */
102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
103 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
104 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
105 # define CONFIG_HW_WATCHDOG
106 # define CONFIG_XILINX_TB_WATCHDOG
107 #endif
108
109 #ifndef CONFIG_OF_CONTROL
110 /* ddr sdram - main memory */
111 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
112 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
113 #endif
114
115 #define CONFIG_SYS_MALLOC_LEN 0xC0000
116 #define CONFIG_SYS_MALLOC_F_LEN 1024
117
118 /* Stack location before relocation */
119 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE
120
121 /*
122 * CFI flash memory layout - Example
123 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
124 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
125 *
126 * SECT_SIZE = 0x20000; 128kB is one sector
127 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
128 *
129 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
130 * FREE 256kB
131 * 0x2204_0000 CONFIG_ENV_ADDR
132 * ENV_AREA 128kB
133 * 0x2206_0000
134 * FREE
135 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
136 *
137 */
138
139 #ifdef FLASH
140 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
141 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
142 # define CONFIG_SYS_FLASH_CFI 1
143 # define CONFIG_FLASH_CFI_DRIVER 1
144 /* ?empty sector */
145 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
146 /* max number of memory banks */
147 # define CONFIG_SYS_MAX_FLASH_BANKS 1
148 /* max number of sectors on one chip */
149 # define CONFIG_SYS_MAX_FLASH_SECT 512
150 /* hardware flash protection */
151 # define CONFIG_SYS_FLASH_PROTECTION
152 /* use buffered writes (20x faster) */
153 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
154 # ifdef RAMENV
155 # define CONFIG_ENV_IS_NOWHERE 1
156 # define CONFIG_ENV_SIZE 0x1000
157 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
158
159 # else /* FLASH && !RAMENV */
160 # define CONFIG_ENV_IS_IN_FLASH 1
161 /* 128K(one sector) for env */
162 # define CONFIG_ENV_SECT_SIZE 0x20000
163 # define CONFIG_ENV_ADDR \
164 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
165 # define CONFIG_ENV_SIZE 0x20000
166 # endif /* FLASH && !RAMBOOT */
167 #else /* !FLASH */
168
169 #ifdef SPIFLASH
170 # define CONFIG_SYS_NO_FLASH 1
171 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
172 # define CONFIG_XILINX_SPI 1
173 # define CONFIG_SPI 1
174 # define CONFIG_SPI_FLASH 1
175 # define CONFIG_SPI_FLASH_STMICRO 1
176 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
177 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
178 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
179
180 # ifdef RAMENV
181 # define CONFIG_ENV_IS_NOWHERE 1
182 # define CONFIG_ENV_SIZE 0x1000
183 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
184
185 # else /* SPIFLASH && !RAMENV */
186 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
187 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
188 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
189 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
190 /* 128K(two sectors) for env */
191 # define CONFIG_ENV_SECT_SIZE 0x10000
192 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
193 /* Warning: adjust the offset in respect of other flash content and size */
194 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
195 # endif /* SPIFLASH && !RAMBOOT */
196 #else /* !SPIFLASH */
197
198 /* ENV in RAM */
199 # define CONFIG_SYS_NO_FLASH 1
200 # define CONFIG_ENV_IS_NOWHERE 1
201 # define CONFIG_ENV_SIZE 0x1000
202 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
203 #endif /* !SPIFLASH */
204 #endif /* !FLASH */
205
206 /* system ace */
207 #ifdef XILINX_SYSACE_BASEADDR
208 # define CONFIG_SYSTEMACE
209 /* #define DEBUG_SYSTEMACE */
210 # define SYSTEMACE_CONFIG_FPGA
211 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
212 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
213 # define CONFIG_DOS_PARTITION
214 #endif
215
216 #if defined(XILINX_USE_ICACHE)
217 # define CONFIG_ICACHE
218 #else
219 # undef CONFIG_ICACHE
220 #endif
221
222 #if defined(XILINX_USE_DCACHE)
223 # define CONFIG_DCACHE
224 #else
225 # undef CONFIG_DCACHE
226 #endif
227
228 #ifndef XILINX_DCACHE_BYTE_SIZE
229 #define XILINX_DCACHE_BYTE_SIZE 32768
230 #endif
231
232 /*
233 * BOOTP options
234 */
235 #define CONFIG_BOOTP_BOOTFILESIZE
236 #define CONFIG_BOOTP_BOOTPATH
237 #define CONFIG_BOOTP_GATEWAY
238 #define CONFIG_BOOTP_HOSTNAME
239
240 /*
241 * Command line configuration.
242 */
243 #include <config_cmd_default.h>
244
245 #define CONFIG_CMD_ASKENV
246 #define CONFIG_CMD_IRQ
247 #define CONFIG_CMD_MFSL
248 #define CONFIG_CMD_ECHO
249 #define CONFIG_CMD_GPIO
250
251 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
252 # define CONFIG_CMD_CACHE
253 #else
254 # undef CONFIG_CMD_CACHE
255 #endif
256
257 #ifndef CONFIG_SYS_ENET
258 # undef CONFIG_CMD_NET
259 # undef CONFIG_CMD_NFS
260 #else
261 # define CONFIG_CMD_PING
262 # define CONFIG_CMD_DHCP
263 # define CONFIG_CMD_TFTPPUT
264 #endif
265
266 #if defined(CONFIG_SYSTEMACE)
267 # define CONFIG_CMD_EXT2
268 # define CONFIG_CMD_FAT
269 #endif
270
271 #if defined(FLASH)
272 # define CONFIG_CMD_ECHO
273 # define CONFIG_CMD_FLASH
274 # define CONFIG_CMD_IMLS
275 # define CONFIG_CMD_JFFS2
276 # define CONFIG_CMD_UBI
277 # undef CONFIG_CMD_UBIFS
278
279 # if !defined(RAMENV)
280 # define CONFIG_CMD_SAVEENV
281 # define CONFIG_CMD_SAVES
282 # endif
283
284 #else
285 #if defined(SPIFLASH)
286 # define CONFIG_CMD_SF
287
288 # if !defined(RAMENV)
289 # define CONFIG_CMD_SAVEENV
290 # define CONFIG_CMD_SAVES
291 # endif
292 #else
293 # undef CONFIG_CMD_IMLS
294 # undef CONFIG_CMD_FLASH
295 # undef CONFIG_CMD_JFFS2
296 # undef CONFIG_CMD_UBI
297 # undef CONFIG_CMD_UBIFS
298 #endif
299 #endif
300
301 #if defined(CONFIG_CMD_JFFS2)
302 # define CONFIG_MTD_PARTITIONS
303 #endif
304
305 #if defined(CONFIG_CMD_UBIFS)
306 # define CONFIG_CMD_UBI
307 # define CONFIG_LZO
308 #endif
309
310 #if defined(CONFIG_CMD_UBI)
311 # define CONFIG_MTD_PARTITIONS
312 # define CONFIG_RBTREE
313 #endif
314
315 #if defined(CONFIG_MTD_PARTITIONS)
316 /* MTD partitions */
317 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
318 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
319 #define CONFIG_FLASH_CFI_MTD
320 #define MTDIDS_DEFAULT "nor0=flash-0"
321
322 /* default mtd partition table */
323 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
324 "256k(env),3m(kernel),1m(romfs),"\
325 "1m(cramfs),-(jffs2)"
326 #endif
327
328 /* Miscellaneous configurable options */
329 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
330 /* size of console buffer */
331 #define CONFIG_SYS_CBSIZE 512
332 /* print buffer size */
333 #define CONFIG_SYS_PBSIZE \
334 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
335 /* max number of command args */
336 #define CONFIG_SYS_MAXARGS 15
337 #define CONFIG_SYS_LONGHELP
338 /* default load address */
339 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
340
341 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
342 #define CONFIG_BOOTARGS "root=romfs"
343 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
344 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
345 #define CONFIG_IPADDR 192.168.0.3
346 #define CONFIG_SERVERIP 192.168.0.5
347 #define CONFIG_GATEWAYIP 192.168.0.1
348 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD
349
350 /* architecture dependent code */
351 #define CONFIG_SYS_USR_EXCEP /* user exception */
352
353 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
354
355 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
356 "nor0=flash-0\0"\
357 "mtdparts=mtdparts=flash-0:"\
358 "256k(u-boot),256k(env),3m(kernel),"\
359 "1m(romfs),1m(cramfs),-(jffs2)\0"\
360 "nc=setenv stdout nc;"\
361 "setenv stdin nc\0" \
362 "serial=setenv stdout serial;"\
363 "setenv stdin serial\0"
364
365 #define CONFIG_CMDLINE_EDITING
366
367 #define CONFIG_NETCONSOLE
368 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
369
370 /* Use the HUSH parser */
371 #define CONFIG_SYS_HUSH_PARSER
372
373 /* Enable flat device tree support */
374 #define CONFIG_LMB 1
375 #define CONFIG_FIT 1
376 #define CONFIG_OF_LIBFDT 1
377
378 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
379 # define CONFIG_MII 1
380 # define CONFIG_CMD_MII 1
381 # define CONFIG_PHY_GIGE 1
382 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
383 # define CONFIG_PHYLIB 1
384 # define CONFIG_PHY_ATHEROS 1
385 # define CONFIG_PHY_BROADCOM 1
386 # define CONFIG_PHY_DAVICOM 1
387 # define CONFIG_PHY_LXT 1
388 # define CONFIG_PHY_MARVELL 1
389 # define CONFIG_PHY_MICREL 1
390 # define CONFIG_PHY_NATSEMI 1
391 # define CONFIG_PHY_REALTEK 1
392 # define CONFIG_PHY_VITESSE 1
393 #else
394 # undef CONFIG_MII
395 # undef CONFIG_CMD_MII
396 # undef CONFIG_PHYLIB
397 #endif
398
399 /* SPL part */
400 #define CONFIG_CMD_SPL
401 #define CONFIG_SPL_FRAMEWORK
402 #define CONFIG_SPL_LIBCOMMON_SUPPORT
403 #define CONFIG_SPL_LIBGENERIC_SUPPORT
404 #define CONFIG_SPL_SERIAL_SUPPORT
405 #define CONFIG_SPL_BOARD_INIT
406
407 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
408
409 #define CONFIG_SPL_RAM_DEVICE
410 #ifdef CONFIG_SYS_FLASH_BASE
411 # define CONFIG_SPL_NOR_SUPPORT
412 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
413 #endif
414
415 /* for booting directly linux */
416 #define CONFIG_SPL_OS_BOOT
417
418 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
419 0x60000)
420 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
421 0x40000)
422 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
423 0x1000000)
424
425 /* SP location before relocation, must use scratch RAM */
426 /* BRAM start */
427 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
428 /* BRAM size - will be generated */
429 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
430 /* Stack pointer prior relocation, must situated at on-chip RAM */
431 #define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \
432 CONFIG_SYS_INIT_RAM_SIZE - \
433 GENERATED_GBL_DATA_SIZE)
434
435 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100
436
437 /*
438 * The main reason to do it in this way is that MALLOC_START
439 * can't be defined - common/spl/spl.c
440 */
441 #if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
442 # define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \
443 CONFIG_SYS_SPL_MALLOC_SIZE)
444 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START
445 #else
446 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END
447 #endif
448
449 /* Just for sure that there is a space for stack */
450 #define CONFIG_SPL_STACK_SIZE 0x100
451
452 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
453
454 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
455 CONFIG_SYS_INIT_RAM_ADDR - \
456 GENERATED_GBL_DATA_SIZE - \
457 CONFIG_SYS_SPL_MALLOC_SIZE - \
458 CONFIG_SPL_STACK_SIZE)
459
460 #endif /* __CONFIG_H */