]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/microblaze-generic.h
Convert CONFIG_SPL_NOR_SUPPORT to Kconfig
[people/ms/u-boot.git] / include / configs / microblaze-generic.h
1 /*
2 * (C) Copyright 2007-2010 Michal Simek
3 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
13
14 /* MicroBlaze CPU */
15 #define MICROBLAZE_V5 1
16
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
19 #define FLASH
20 #undef SPIFLASH
21 #undef RAMENV /* hold environment in flash */
22 #else
23 #ifdef XILINX_SPI_FLASH_BASEADDR
24 #undef FLASH
25 #define SPIFLASH
26 #undef RAMENV /* hold environment in flash */
27 #else
28 #undef FLASH
29 #undef SPIFLASH
30 #define RAMENV /* hold environment in RAM */
31 #endif
32 #endif
33
34 /* uart */
35 # define CONFIG_BAUDRATE 115200
36 /* The following table includes the supported baudrates */
37 # define CONFIG_SYS_BAUDRATE_TABLE \
38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
39
40 /* setting reset address */
41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
42
43 /* gpio */
44 #ifdef XILINX_GPIO_BASEADDR
45 # define CONFIG_XILINX_GPIO
46 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
47 #endif
48 #define CONFIG_BOARD_LATE_INIT
49
50 /* watchdog */
51 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
52 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
53 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
54 # ifndef CONFIG_SPL_BUILD
55 # define CONFIG_HW_WATCHDOG
56 # define CONFIG_XILINX_TB_WATCHDOG
57 # endif
58 #endif
59
60 #define CONFIG_SYS_MALLOC_LEN 0xC0000
61
62 /* Stack location before relocation */
63 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
64 CONFIG_SYS_MALLOC_F_LEN)
65
66 /*
67 * CFI flash memory layout - Example
68 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
69 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
70 *
71 * SECT_SIZE = 0x20000; 128kB is one sector
72 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
73 *
74 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
75 * FREE 256kB
76 * 0x2204_0000 CONFIG_ENV_ADDR
77 * ENV_AREA 128kB
78 * 0x2206_0000
79 * FREE
80 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
81 *
82 */
83
84 #ifdef FLASH
85 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
86 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
87 # define CONFIG_SYS_FLASH_CFI 1
88 # define CONFIG_FLASH_CFI_DRIVER 1
89 /* ?empty sector */
90 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
91 /* max number of memory banks */
92 # define CONFIG_SYS_MAX_FLASH_BANKS 1
93 /* max number of sectors on one chip */
94 # define CONFIG_SYS_MAX_FLASH_SECT 512
95 /* hardware flash protection */
96 # define CONFIG_SYS_FLASH_PROTECTION
97 /* use buffered writes (20x faster) */
98 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
99 # ifdef RAMENV
100 # define CONFIG_ENV_IS_NOWHERE 1
101 # define CONFIG_ENV_SIZE 0x1000
102 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
103
104 # else /* FLASH && !RAMENV */
105 # define CONFIG_ENV_IS_IN_FLASH 1
106 /* 128K(one sector) for env */
107 # define CONFIG_ENV_SECT_SIZE 0x20000
108 # define CONFIG_ENV_ADDR \
109 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
110 # define CONFIG_ENV_SIZE 0x20000
111 # endif /* FLASH && !RAMBOOT */
112 #else /* !FLASH */
113
114 #ifdef SPIFLASH
115 # define CONFIG_SYS_NO_FLASH 1
116 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
117 # define CONFIG_SPI 1
118 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
119 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
120 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
121
122 # ifdef RAMENV
123 # define CONFIG_ENV_IS_NOWHERE 1
124 # define CONFIG_ENV_SIZE 0x1000
125 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
126
127 # else /* SPIFLASH && !RAMENV */
128 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
129 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
130 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
131 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
132 /* 128K(two sectors) for env */
133 # define CONFIG_ENV_SECT_SIZE 0x10000
134 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
135 /* Warning: adjust the offset in respect of other flash content and size */
136 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
137 # endif /* SPIFLASH && !RAMBOOT */
138 #else /* !SPIFLASH */
139
140 /* ENV in RAM */
141 # define CONFIG_SYS_NO_FLASH 1
142 # define CONFIG_ENV_IS_NOWHERE 1
143 # define CONFIG_ENV_SIZE 0x1000
144 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
145 #endif /* !SPIFLASH */
146 #endif /* !FLASH */
147
148 #if defined(XILINX_USE_ICACHE)
149 # define CONFIG_ICACHE
150 #else
151 # undef CONFIG_ICACHE
152 #endif
153
154 #if defined(XILINX_USE_DCACHE)
155 # define CONFIG_DCACHE
156 #else
157 # undef CONFIG_DCACHE
158 #endif
159
160 #ifndef XILINX_DCACHE_BYTE_SIZE
161 #define XILINX_DCACHE_BYTE_SIZE 32768
162 #endif
163
164 /*
165 * BOOTP options
166 */
167 #define CONFIG_BOOTP_BOOTFILESIZE
168 #define CONFIG_BOOTP_BOOTPATH
169 #define CONFIG_BOOTP_GATEWAY
170 #define CONFIG_BOOTP_HOSTNAME
171
172 /*
173 * Command line configuration.
174 */
175 #define CONFIG_CMD_IRQ
176 #define CONFIG_CMD_MFSL
177
178 #if defined(FLASH)
179 # define CONFIG_CMD_JFFS2
180 # define CONFIG_CMD_UBI
181 # undef CONFIG_CMD_UBIFS
182
183 # if !defined(RAMENV)
184 # define CONFIG_CMD_SAVES
185 # endif
186
187 #else
188 #if defined(SPIFLASH)
189
190 # if !defined(RAMENV)
191 # define CONFIG_CMD_SAVES
192 # endif
193 #else
194 # undef CONFIG_CMD_JFFS2
195 # undef CONFIG_CMD_UBI
196 # undef CONFIG_CMD_UBIFS
197 #endif
198 #endif
199
200 #if defined(CONFIG_CMD_JFFS2)
201 # define CONFIG_MTD_PARTITIONS
202 #endif
203
204 #if defined(CONFIG_CMD_UBIFS)
205 # define CONFIG_CMD_UBI
206 # define CONFIG_LZO
207 #endif
208
209 #if defined(CONFIG_CMD_UBI)
210 # define CONFIG_MTD_PARTITIONS
211 # define CONFIG_RBTREE
212 #endif
213
214 #if defined(CONFIG_MTD_PARTITIONS)
215 /* MTD partitions */
216 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
217 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
218 #define CONFIG_FLASH_CFI_MTD
219 #define MTDIDS_DEFAULT "nor0=flash-0"
220
221 /* default mtd partition table */
222 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
223 "256k(env),3m(kernel),1m(romfs),"\
224 "1m(cramfs),-(jffs2)"
225 #endif
226
227 /* size of console buffer */
228 #define CONFIG_SYS_CBSIZE 512
229 /* print buffer size */
230 #define CONFIG_SYS_PBSIZE \
231 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
232 /* max number of command args */
233 #define CONFIG_SYS_MAXARGS 15
234 #define CONFIG_SYS_LONGHELP
235 /* default load address */
236 #define CONFIG_SYS_LOAD_ADDR 0
237
238 #define CONFIG_BOOTARGS "root=romfs"
239 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
240 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
241 #define CONFIG_IPADDR 192.168.0.3
242 #define CONFIG_SERVERIP 192.168.0.5
243 #define CONFIG_GATEWAYIP 192.168.0.1
244
245 /* architecture dependent code */
246 #define CONFIG_SYS_USR_EXCEP /* user exception */
247
248 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
249
250 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
251 "nor0=flash-0\0"\
252 "mtdparts=mtdparts=flash-0:"\
253 "256k(u-boot),256k(env),3m(kernel),"\
254 "1m(romfs),1m(cramfs),-(jffs2)\0"\
255 "nc=setenv stdout nc;"\
256 "setenv stdin nc\0" \
257 "serial=setenv stdout serial;"\
258 "setenv stdin serial\0"
259
260 #define CONFIG_CMDLINE_EDITING
261
262 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
263
264 /* Enable flat device tree support */
265 #define CONFIG_LMB 1
266
267 #if defined(CONFIG_XILINX_AXIEMAC)
268 # define CONFIG_MII 1
269 # define CONFIG_PHY_GIGE 1
270 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
271 # define CONFIG_PHY_ATHEROS 1
272 # define CONFIG_PHY_BROADCOM 1
273 # define CONFIG_PHY_DAVICOM 1
274 # define CONFIG_PHY_LXT 1
275 # define CONFIG_PHY_MARVELL 1
276 # define CONFIG_PHY_MICREL 1
277 # define CONFIG_PHY_MICREL_KSZ9021
278 # define CONFIG_PHY_NATSEMI 1
279 # define CONFIG_PHY_REALTEK 1
280 # define CONFIG_PHY_VITESSE 1
281 #else
282 # undef CONFIG_MII
283 #endif
284
285 /* SPL part */
286 #define CONFIG_CMD_SPL
287 #define CONFIG_SPL_FRAMEWORK
288 #define CONFIG_SPL_SERIAL_SUPPORT
289 #define CONFIG_SPL_BOARD_INIT
290
291 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
292
293 #define CONFIG_SPL_RAM_DEVICE
294 #ifdef CONFIG_SYS_FLASH_BASE
295 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
296 #endif
297
298 /* for booting directly linux */
299 #define CONFIG_SPL_OS_BOOT
300
301 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
302 0x60000)
303 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
304 0x40000)
305 #define CONFIG_SYS_FDT_SIZE (16<<10)
306 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
307 0x1000000)
308
309 /* SP location before relocation, must use scratch RAM */
310 /* BRAM start */
311 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
312 /* BRAM size - will be generated */
313 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
314
315 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
316 CONFIG_SYS_INIT_RAM_SIZE - \
317 CONFIG_SYS_MALLOC_F_LEN)
318
319 /* Just for sure that there is a space for stack */
320 #define CONFIG_SPL_STACK_SIZE 0x100
321
322 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
323
324 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
325 CONFIG_SYS_INIT_RAM_ADDR - \
326 CONFIG_SYS_MALLOC_F_LEN - \
327 CONFIG_SPL_STACK_SIZE)
328
329 #endif /* __CONFIG_H */