include/configs/mp2usb.h

   1 /*
   2  * 2004-2005 Gary Jennejohn <garyj@denx.de>
   3  *
   4  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
   5  * ebenard@eukrea.com
   6  *
   7  * Configuration settings for the MP2USB board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /* ARM asynchronous clock */
  32 #define AT91C_MAIN_CLOCK        179712000       /* from 18.432 MHz crystal (18432000 / 4 * 45) */
  33 #define AT91C_MASTER_CLOCK      (AT91C_MAIN_CLOCK/3)    /* peripheral clock */
  34
  35 #define AT91_SLOW_CLOCK         32768   /* slow clock */
  36
  37 #define CONFIG_ARM920T          1       /* This is an ARM920T Core      */
  38 #define CONFIG_AT91RM9200       1       /* It's an Atmel AT91RM9200 SoC */
  39 #define CONFIG_AT91RM9200DK     1       /* on an AT91RM9200DK Board     */
  40 #define CONFIG_MP2USB           1       /* on an MP2USB Board           */
  41 #undef  CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
  42 #define USE_920T_MMU            1
  43
  44 #define CONFIG_CMDLINE_TAG      1       /* enable passing of ATAGs      */
  45 #define CONFIG_SETUP_MEMORY_TAGS 1
  46 #define CONFIG_INITRD_TAG       1
  47
  48 #define CONFIG_SYS_ATMEL_PLL_INIT_BUG   1
  49 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  50 #define CONFIG_SYS_USE_MAIN_OSCILLATOR  1
  51 /* flash */
  52 #define CONFIG_SYS_MC_PUIA_VAL  0x00000000
  53 #define CONFIG_SYS_MC_PUP_VAL   0x00000000
  54 #define CONFIG_SYS_MC_PUER_VAL  0x00000000
  55 #define CONFIG_SYS_MC_ASR_VAL   0x00000000
  56 #define CONFIG_SYS_MC_AASR_VAL  0x00000000
  57 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  58 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
  59
  60 /* clocks */
  61 #define CONFIG_SYS_PLLAR_VAL    0x20263E04 /* 180 MHz for PCK */
  62 #define CONFIG_SYS_PLLBR_VAL    0x1048bE0E /* 48 MHz (divider by 2 for USB) */
  63 #define CONFIG_SYS_MCKR_VAL     0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
  64
  65 /* sdram */
  66 #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
  67 #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  68 #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  69 #define CONFIG_SYS_EBI_CSA_VAL  0x00000002 /* CS1=CONFIG_SYS_SDRAM */
  70 #define CONFIG_SYS_SDRC_CR_VAL  0x3211295A /* set up the CONFIG_SYS_SDRAM */
  71 #define CONFIG_SYS_SDRAM        0x20000000 /* address of the CONFIG_SYS_SDRAM */
  72 #define CONFIG_SYS_SDRAM1       0x20000020 /* address of the CONFIG_SYS_SDRAM */
  73 #define CONFIG_SYS_SDRAM_VAL    0x00000000 /* value written to CONFIG_SYS_SDRAM */
  74 #define CONFIG_SYS_SDRC_MR_VAL  0x00000002 /* Precharge All */
  75 #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  76 #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  77 #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  78 #define CONFIG_SYS_SDRC_TR_VAL  0x000002E0 /* Write refresh rate */
  79 #else
  80 #define CONFIG_SKIP_RELOCATE_UBOOT
  81 #endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  82
  83 /*
  84  * Size of malloc() pool
  85  */
  86 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 128*1024)
  87 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
  88
  89 #define CONFIG_BAUDRATE         115200
  90
  91 #define CONFIG_SYS_AT91C_BRGR_DIVISOR   33      /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
  92
  93 /*
  94  * Hardware drivers
  95  */
  96
  97 /* define one of these to choose the DBGU, USART0  or USART1 as console */
  98 #define CONFIG_DBGU
  99 #undef CONFIG_USART0
 100 #undef CONFIG_USART1
 101
 102 #undef  CONFIG_HWFLOW                   /* don't include RTS/CTS flow control support   */
 103
 104 #undef  CONFIG_MODEM_SUPPORT            /* disable modem initialization stuff */
 105
 106 #define CONFIG_USB_OHCI_NEW     1
 107 #define CONFIG_USB_KEYBOARD     1
 108 #define CONFIG_USB_STORAGE      1
 109 #define CONFIG_DOS_PARTITION    1
 110 #define CONFIG_AT91C_PQFP_UHPBUG 1
 111
 112 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 113 #define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 114 #define CONFIG_SYS_USB_OHCI_REGS_BASE           AT91_USB_HOST_BASE
 115 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91rm9200"
 116 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 117
 118 #undef CONFIG_HARD_I2C
 119
 120 #ifdef CONFIG_HARD_I2C
 121 #define CONFIG_SYS_I2C_SPEED            0       /* not used */
 122 #define CONFIG_SYS_I2C_SLAVE            0       /* not used */
 123 #define CONFIG_RTC_RS5C372A             /* RICOH I2C RTC */
 124 #define CONFIG_SYS_I2C_RTC_ADDR 0x32
 125 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 126 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 127 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 128 #endif
 129 /* still about 20 kB free with this defined */
 130 #define CONFIG_SYS_LONGHELP
 131
 132 #define CONFIG_BOOTDELAY      3
 133
 134 #if !defined(CONFIG_HARD_I2C)
 135 #define CONFIG_TIMESTAMP
 136 #endif
 137
 138
 139 /*
 140  * BOOTP options
 141  */
 142 #define CONFIG_BOOTP_BOOTFILESIZE
 143 #define CONFIG_BOOTP_BOOTPATH
 144 #define CONFIG_BOOTP_GATEWAY
 145 #define CONFIG_BOOTP_HOSTNAME
 146
 147
 148 /*
 149  * Command line configuration.
 150  */
 151 #include <config_cmd_default.h>
 152
 153 #define CONFIG_CMD_DHCP
 154 #define CONFIG_CMD_NFS
 155 #define CONFIG_CMD_SNTP
 156
 157 #if defined(CONFIG_HARD_I2C)
 158
 159     #define CONFIG_CMD_DATE
 160     #define CONFIG_CMD_EEPROM
 161     #define CONFIG_CMD_I2C
 162     #define CONFIG_CMD_MISC
 163
 164 #else
 165
 166     #define CONFIG_CMD_USB
 167     #define CONFIG_CMD_CACHE
 168
 169     #undef CONFIG_CMD_AUTOSCRIPT
 170     #undef CONFIG_CMD_BDI
 171     #undef CONFIG_CMD_FPGA
 172     #undef CONFIG_CMD_IMI
 173     #undef CONFIG_CMD_LOADS
 174     #undef CONFIG_CMD_MISC
 175
 176 #endif
 177
 178
 179 #define CONFIG_SYS_LONGHELP
 180
 181 #define CONFIG_NR_DRAM_BANKS    1
 182 #define PHYS_SDRAM              0x20000000
 183 #define PHYS_SDRAM_SIZE         0x08000000      /* 128 megs */
 184
 185 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 186 #define CONFIG_SYS_MEMTEST_END          CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
 187
 188 #define CONFIG_DRIVER_ETHER
 189 #define CONFIG_NET_RETRY_COUNT          20
 190 #undef CONFIG_AT91C_USE_RMII
 191
 192 #define PHYS_FLASH_1                    0x10000000
 193 #define PHYS_FLASH_SIZE                 0x1000000  /* 16 megs main flash */
 194 #define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 195 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 196 #define CONFIG_SYS_MAX_FLASH_BANKS              1
 197 #define CONFIG_SYS_MAX_FLASH_SECT               256
 198 #define CONFIG_SYS_FLASH_ERASE_TOUT             (2 * CONFIG_SYS_HZ)     /* Timeout for Flash Erase */
 199 #define CONFIG_SYS_FLASH_WRITE_TOUT             (2 * CONFIG_SYS_HZ)     /* Timeout for Flash Write */
 200 #define CONFIG_SYS_FLASH_LOCK_TOUT              (10*CONFIG_SYS_HZ)      /* Timeout for Flash Set Lock Bit */
 201 #define CONFIG_SYS_FLASH_UNLOCK_TOUT            (10*CONFIG_SYS_HZ)      /* Timeout for Flash Clear Lock Bits */
 202 #define CONFIG_SYS_FLASH_PROTECTION                             /* "Real" (hardware) sectors protection */
 203
 204 #define CONFIG_ENV_IS_IN_FLASH          1
 205 #define CONFIG_ENV_OFFSET                       0x20000         /* after u-boot.bin */
 206 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE+CONFIG_ENV_OFFSET)
 207 #define CONFIG_ENV_SIZE                 0x20000
 208
 209 #define CONFIG_SYS_LOAD_ADDR            0x21000000  /* default load address */
 210
 211 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200, 57600, 38400, 19200, 9600 }
 212
 213 #define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
 214 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size */
 215 #define CONFIG_SYS_MAXARGS              32              /* max number of command args */
 216 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 217
 218 #define CONFIG_SYS_DEVICE_DEREGISTER           /* needs device_deregister */
 219 #define LITTLEENDIAN            1       /* used by usb_ohci.c  */
 220
 221 #define CONFIG_SYS_HZ 1000
 222 #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2)      /* AT91C_TC0_CMR is implicitly set to */
 223                                                 /* AT91C_TC_TIMER_DIV1_CLOCK */
 224
 225 #define CONFIG_STACKSIZE        (32*1024)       /* regular stack */
 226
 227 #ifdef CONFIG_USE_IRQ
 228 #error CONFIG_USE_IRQ not supported
 229 #endif
 230
 231 #define CONFIG_SYS_DEVICE_NULLDEV        1      /* enble null device            */
 232 #undef CONFIG_SILENT_CONSOLE            /* enable silent startup        */
 233
 234 #define CONFIG_AUTOBOOT_KEYED
 235 #define CONFIG_AUTOBOOT_PROMPT  \
 236         "Press SPACE to abort autoboot in %d seconds\n", bootdelay
 237 #define CONFIG_AUTOBOOT_STOP_STR " "
 238 #define CONFIG_AUTOBOOT_DELAY_STR "d"
 239
 240 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 241
 242 #endif  /* __CONFIG_H */