include/configs/mx31ads.h

   1 /*
   2  * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
   3  *
   4  * Configuration settings for the MX31ADS Freescale board.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 #include <asm/arch/imx-regs.h>
  26
  27  /* High Level Configuration Options */
  28 #define CONFIG_ARM1136          1               /* This is an arm1136 CPU core */
  29 #define CONFIG_MX31             1               /* in a mx31 */
  30 #define CONFIG_MX31_HCLK_FREQ   26000000        /* RedBoot says 26MHz */
  31 #define CONFIG_MX31_CLK32       32768
  32
  33 #define CONFIG_DISPLAY_CPUINFO
  34 #define CONFIG_DISPLAY_BOARDINFO
  35
  36 #define CONFIG_SYS_TEXT_BASE            0xA0000000
  37
  38 #define CONFIG_MACH_TYPE        MACH_TYPE_MX31ADS
  39
  40 /*
  41  * Disabled for now due to build problems under Debian and a significant increase
  42  * in the final file size: 144260 vs. 109536 Bytes.
  43  */
  44 #if 0
  45 #define CONFIG_OF_LIBFDT                1
  46 #define CONFIG_FIT                      1
  47 #define CONFIG_FIT_VERBOSE              1
  48 #endif
  49
  50 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  51 #define CONFIG_SETUP_MEMORY_TAGS        1
  52 #define CONFIG_INITRD_TAG               1
  53
  54 /*
  55  * Size of malloc() pool
  56  */
  57 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
  58
  59 /*
  60  * Hardware drivers
  61  */
  62
  63 #define CONFIG_MXC_UART
  64 #define CONFIG_MXC_UART_BASE    UART1_BASE
  65
  66 #define CONFIG_HARD_SPI         1
  67 #define CONFIG_MXC_SPI          1
  68 #define CONFIG_DEFAULT_SPI_BUS  1
  69 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
  70 #define CONFIG_MXC_GPIO
  71
  72 /* PMIC Controller */
  73 #define CONFIG_PMIC
  74 #define CONFIG_PMIC_SPI
  75 #define CONFIG_PMIC_FSL
  76 #define CONFIG_FSL_PMIC_BUS     1
  77 #define CONFIG_FSL_PMIC_CS      0
  78 #define CONFIG_FSL_PMIC_CLK     1000000
  79 #define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
  80 #define CONFIG_FSL_PMIC_BITLEN  32
  81 #define CONFIG_RTC_MC13XXX
  82
  83 /* allow to overwrite serial and ethaddr */
  84 #define CONFIG_ENV_OVERWRITE
  85 #define CONFIG_CONS_INDEX       1
  86 #define CONFIG_BAUDRATE         115200
  87
  88 /***********************************************************
  89  * Command definition
  90  ***********************************************************/
  91
  92 #include <config_cmd_default.h>
  93
  94 #define CONFIG_CMD_PING
  95 #define CONFIG_CMD_DHCP
  96 #define CONFIG_CMD_SPI
  97 #define CONFIG_CMD_DATE
  98
  99 #define CONFIG_BOOTDELAY        3
 100
 101 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
 102
 103 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 104         "netdev=eth0\0"                                                 \
 105         "uboot_addr=0xa0000000\0"                                       \
 106         "uboot=mx31ads/u-boot.bin\0"                                    \
 107         "kernel=mx31ads/uImage\0"                                       \
 108         "nfsroot=/opt/eldk/arm\0"                                       \
 109         "bootargs_base=setenv bootargs console=ttymxc0,115200\0"        \
 110         "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "       \
 111                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"       \
 112         "bootcmd=run bootcmd_net\0"                                     \
 113         "bootcmd_net=run bootargs_base bootargs_nfs; "                  \
 114                 "tftpboot ${loadaddr} ${kernel}; bootm\0"               \
 115         "prg_uboot=tftpboot ${loadaddr} ${uboot}; "                     \
 116                 "protect off ${uboot_addr} 0xa003ffff; "                \
 117                 "erase ${uboot_addr} 0xa003ffff; "                      \
 118                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}; "          \
 119                 "setenv filesize; saveenv\0"
 120
 121 #define CONFIG_CS8900
 122 #define CONFIG_CS8900_BASE      0xb4020300
 123 #define CONFIG_CS8900_BUS16             1       /* follow the Linux driver */
 124
 125 /*
 126  * The MX31ADS board seems to have a hardware "peculiarity" confirmed under
 127  * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
 128  * controller inverted. The controller is capable of detecting and correcting
 129  * this, but it needs 4 network packets for that. Which means, at startup, you
 130  * will not receive answers to the first 4 packest, unless there have been some
 131  * broadcasts on the network, or your board is on a hub. Reducing the ARP
 132  * timeout from default 5 seconds to 200ms we speed up the initial TFTP
 133  * transfer, should the user wish one, significantly.
 134  */
 135 #define CONFIG_ARP_TIMEOUT      200UL
 136
 137 /*
 138  * Miscellaneous configurable options
 139  */
 140 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 141 #define CONFIG_SYS_PROMPT               "=> "
 142 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size */
 143 /* Print Buffer Size */
 144 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 145 #define CONFIG_SYS_MAXARGS              16              /* max number of command args */
 146 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 147
 148 #define CONFIG_SYS_MEMTEST_START        0               /* memtest works on */
 149 #define CONFIG_SYS_MEMTEST_END          0x10000
 150
 151 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 152
 153 #define CONFIG_SYS_HZ                   1000
 154
 155 #define CONFIG_CMDLINE_EDITING  1
 156
 157 /*-----------------------------------------------------------------------
 158  * Physical Memory Map
 159  */
 160 #define CONFIG_NR_DRAM_BANKS    1
 161 #define PHYS_SDRAM_1            CSD0_BASE
 162 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
 163 #define CONFIG_BOARD_EARLY_INIT_F
 164
 165 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 166 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 167 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 168 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 169                                                 GENERATED_GBL_DATA_SIZE)
 170 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 171                                                 CONFIG_SYS_GBL_DATA_OFFSET)
 172
 173 /*-----------------------------------------------------------------------
 174  * FLASH and environment organization
 175  */
 176 #define CONFIG_SYS_FLASH_BASE           CS0_BASE
 177 #define CONFIG_SYS_MAX_FLASH_BANKS      1               /* max number of memory banks */
 178 #define CONFIG_SYS_MAX_FLASH_SECT       262             /* max number of sectors on one chip */
 179 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE   /* Monitor at beginning of flash */
 180 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256KiB */
 181
 182 #define CONFIG_ENV_IS_IN_FLASH  1
 183 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 184 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 185 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 186
 187 /* Address and size of Redundant Environment Sector     */
 188 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 189 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 190
 191
 192 /*-----------------------------------------------------------------------
 193  * CFI FLASH driver setup
 194  */
 195 #define CONFIG_SYS_FLASH_CFI                    1 /* Flash memory is CFI compliant */
 196 #define CONFIG_FLASH_CFI_DRIVER         1 /* Use drivers/cfi_flash.c */
 197 #define CONFIG_FLASH_SPANSION_S29WS_N   1 /* A non-standard buffered write algorithm */
 198 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1 /* Use buffered writes (~10x faster) */
 199 #define CONFIG_SYS_FLASH_PROTECTION             1 /* Use hardware sector protection */
 200
 201 /*
 202  * JFFS2 partitions
 203  */
 204 #undef CONFIG_CMD_MTDPARTS
 205 #define CONFIG_JFFS2_DEV        "nor0"
 206
 207 #endif /* __CONFIG_H */