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1 /*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #ifndef __CONFIG_H
25 #define __CONFIG_H
26
27 /* High Level Configuration Options */
28
29 #define CONFIG_MX51 /* in a mx51 */
30
31 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_DISPLAY_BOARDINFO
33
34 #define CONFIG_SYS_TEXT_BASE 0x97800000
35
36 #include <asm/arch/imx-regs.h>
37 /*
38 * Disabled for now due to build problems under Debian and a significant
39 * increase in the final file size: 144260 vs. 109536 Bytes.
40 */
41
42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_INITRD_TAG
45 #define CONFIG_REVISION_TAG
46
47 #define CONFIG_OF_LIBFDT
48
49 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
50 /*
51 * Size of malloc() pool
52 */
53 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
54
55 #define CONFIG_BOARD_LATE_INIT
56
57 /*
58 * Hardware drivers
59 */
60 #define CONFIG_MXC_UART
61 #define CONFIG_MXC_UART_BASE UART1_BASE
62 #define CONFIG_MXC_GPIO
63
64 /*
65 * SPI Configs
66 * */
67 #define CONFIG_CMD_SPI
68
69 #define CONFIG_MXC_SPI
70
71 /* PMIC Controller */
72 #define CONFIG_PMIC
73 #define CONFIG_PMIC_SPI
74 #define CONFIG_PMIC_FSL
75 #define CONFIG_FSL_PMIC_BUS 0
76 #define CONFIG_FSL_PMIC_CS 0
77 #define CONFIG_FSL_PMIC_CLK 2500000
78 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
79 #define CONFIG_FSL_PMIC_BITLEN 32
80 #define CONFIG_RTC_MC13XXX
81
82 /*
83 * MMC Configs
84 * */
85 #define CONFIG_FSL_ESDHC
86 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
87 #define CONFIG_SYS_FSL_ESDHC_NUM 2
88
89 #define CONFIG_MMC
90
91 #define CONFIG_CMD_MMC
92 #define CONFIG_GENERIC_MMC
93 #define CONFIG_CMD_FAT
94 #define CONFIG_DOS_PARTITION
95
96 /*
97 * Eth Configs
98 */
99 #define CONFIG_HAS_ETH1
100 #define CONFIG_MII
101
102 #define CONFIG_FEC_MXC
103 #define IMX_FEC_BASE FEC_BASE_ADDR
104 #define CONFIG_FEC_MXC_PHYADDR 0x1F
105
106 #define CONFIG_CMD_PING
107 #define CONFIG_CMD_DHCP
108 #define CONFIG_CMD_MII
109 #define CONFIG_CMD_NET
110
111 /* USB Configs */
112 #define CONFIG_CMD_USB
113 #define CONFIG_CMD_FAT
114 #define CONFIG_USB_EHCI
115 #define CONFIG_USB_EHCI_MX5
116 #define CONFIG_USB_STORAGE
117 #define CONFIG_USB_HOST_ETHER
118 #define CONFIG_USB_ETHER_ASIX
119 #define CONFIG_USB_ETHER_SMSC95XX
120 #define CONFIG_MXC_USB_PORT 1
121 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
122 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
123
124 /* Framebuffer and LCD */
125 #define CONFIG_PREBOOT
126 #define CONFIG_VIDEO
127 #define CONFIG_VIDEO_IPUV3
128 #define CONFIG_CFB_CONSOLE
129 #define CONFIG_VGA_AS_SINGLE_DEVICE
130 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
131 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
132 #define CONFIG_VIDEO_BMP_RLE8
133 #define CONFIG_SPLASH_SCREEN
134 #define CONFIG_BMP_16BPP
135 #define CONFIG_VIDEO_LOGO
136 #define CONFIG_IPUV3_CLK 133000000
137
138 /* allow to overwrite serial and ethaddr */
139 #define CONFIG_ENV_OVERWRITE
140 #define CONFIG_CONS_INDEX 1
141 #define CONFIG_BAUDRATE 115200
142
143 /***********************************************************
144 * Command definition
145 ***********************************************************/
146
147 #include <config_cmd_default.h>
148
149 #undef CONFIG_CMD_IMLS
150
151 #define CONFIG_CMD_DATE
152
153 #define CONFIG_BOOTDELAY 3
154
155 #define CONFIG_ETHPRIME "FEC0"
156
157 #define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */
158
159 #define CONFIG_EXTRA_ENV_SETTINGS \
160 "script=boot.scr\0" \
161 "uimage=uImage\0" \
162 "mmcdev=0\0" \
163 "mmcpart=2\0" \
164 "mmcroot=/dev/mmcblk0p3 rw\0" \
165 "mmcrootfstype=ext3 rootwait\0" \
166 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
167 "root=${mmcroot} " \
168 "rootfstype=${mmcrootfstype}\0" \
169 "loadbootscript=" \
170 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
171 "bootscript=echo Running bootscript from mmc ...; " \
172 "source\0" \
173 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
174 "mmcboot=echo Booting from mmc ...; " \
175 "run mmcargs; " \
176 "bootm\0" \
177 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
178 "root=/dev/nfs " \
179 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
180 "netboot=echo Booting from net ...; " \
181 "run netargs; " \
182 "dhcp ${uimage}; bootm\0" \
183
184 #define CONFIG_BOOTCOMMAND \
185 "if mmc rescan ${mmcdev}; then " \
186 "if run loadbootscript; then " \
187 "run bootscript; " \
188 "else " \
189 "if run loaduimage; then " \
190 "run mmcboot; " \
191 "else run netboot; " \
192 "fi; " \
193 "fi; " \
194 "else run netboot; fi"
195
196 #define CONFIG_ARP_TIMEOUT 200UL
197
198 /*
199 * Miscellaneous configurable options
200 */
201 #define CONFIG_SYS_LONGHELP /* undef to save memory */
202 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
203 #define CONFIG_SYS_PROMPT "MX51EVK U-Boot > "
204 #define CONFIG_AUTO_COMPLETE
205 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
206 /* Print Buffer Size */
207 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
208 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
209 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
210
211 #define CONFIG_SYS_MEMTEST_START 0x90000000
212 #define CONFIG_SYS_MEMTEST_END 0x90010000
213
214 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
215
216 #define CONFIG_SYS_HZ 1000
217 #define CONFIG_CMDLINE_EDITING
218
219 /*-----------------------------------------------------------------------
220 * Physical Memory Map
221 */
222 #define CONFIG_NR_DRAM_BANKS 1
223 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
224 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
225
226 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
227 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
228 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
229
230 #define CONFIG_BOARD_EARLY_INIT_F
231
232 #define CONFIG_SYS_INIT_SP_OFFSET \
233 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
234 #define CONFIG_SYS_INIT_SP_ADDR \
235 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
236
237 #define CONFIG_SYS_DDR_CLKSEL 0
238 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
239
240 /*-----------------------------------------------------------------------
241 * FLASH and environment organization
242 */
243 #define CONFIG_SYS_NO_FLASH
244
245 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
246 #define CONFIG_ENV_SIZE (8 * 1024)
247 #define CONFIG_ENV_IS_IN_MMC
248 #define CONFIG_SYS_MMC_ENV_DEV 0
249
250 #endif