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1 /*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the MX53-EVK Freescale board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #define CONFIG_MX53
13
14 #define CONFIG_DISPLAY_CPUINFO
15 #define CONFIG_DISPLAY_BOARDINFO
16
17 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
18
19 #include <asm/arch/imx-regs.h>
20
21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
22 #define CONFIG_SETUP_MEMORY_TAGS
23 #define CONFIG_INITRD_TAG
24 #define CONFIG_REVISION_TAG
25
26 #define CONFIG_SYS_FSL_CLK
27
28 /* Size of malloc() pool */
29 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30
31 #define CONFIG_BOARD_EARLY_INIT_F
32 #define CONFIG_BOARD_LATE_INIT
33 #define CONFIG_MXC_GPIO
34
35 #define CONFIG_MXC_UART
36 #define CONFIG_MXC_UART_BASE UART1_BASE
37
38 /* I2C Configs */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
44
45 /* PMIC Configs */
46 #define CONFIG_POWER
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_FSL
49 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
50 #define CONFIG_POWER_FSL_MC13892
51 #define CONFIG_RTC_MC13XXX
52
53 /* MMC Configs */
54 #define CONFIG_FSL_ESDHC
55 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
56 #define CONFIG_SYS_FSL_ESDHC_NUM 2
57
58 #define CONFIG_MMC
59 #define CONFIG_GENERIC_MMC
60 #define CONFIG_DOS_PARTITION
61
62 /* Eth Configs */
63 #define CONFIG_MII
64
65 #define CONFIG_FEC_MXC
66 #define IMX_FEC_BASE FEC_BASE_ADDR
67 #define CONFIG_FEC_MXC_PHYADDR 0x1F
68
69 #define CONFIG_CMD_DATE
70
71 /* Miscellaneous commands */
72 #define CONFIG_CMD_BMODE
73
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_CONS_INDEX 1
77 #define CONFIG_BAUDRATE 115200
78
79 /* Command definition */
80
81 #define CONFIG_ETHPRIME "FEC0"
82
83 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
84 #define CONFIG_SYS_TEXT_BASE 0x77800000
85
86 #define CONFIG_EXTRA_ENV_SETTINGS \
87 "script=boot.scr\0" \
88 "uimage=uImage\0" \
89 "mmcdev=0\0" \
90 "mmcpart=2\0" \
91 "mmcroot=/dev/mmcblk0p3 rw\0" \
92 "mmcrootfstype=ext3 rootwait\0" \
93 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
94 "root=${mmcroot} " \
95 "rootfstype=${mmcrootfstype}\0" \
96 "loadbootscript=" \
97 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
98 "bootscript=echo Running bootscript from mmc ...; " \
99 "source\0" \
100 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
101 "mmcboot=echo Booting from mmc ...; " \
102 "run mmcargs; " \
103 "bootm\0" \
104 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
105 "root=/dev/nfs " \
106 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
107 "netboot=echo Booting from net ...; " \
108 "run netargs; " \
109 "dhcp ${uimage}; bootm\0" \
110
111 #define CONFIG_BOOTCOMMAND \
112 "mmc dev ${mmcdev}; if mmc rescan; then " \
113 "if run loadbootscript; then " \
114 "run bootscript; " \
115 "else " \
116 "if run loaduimage; then " \
117 "run mmcboot; " \
118 "else run netboot; " \
119 "fi; " \
120 "fi; " \
121 "else run netboot; fi"
122
123 #define CONFIG_ARP_TIMEOUT 200UL
124
125 /* Miscellaneous configurable options */
126 #define CONFIG_SYS_LONGHELP /* undef to save memory */
127 #define CONFIG_AUTO_COMPLETE
128 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
129
130 /* Print Buffer Size */
131 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
132 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
133 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
134
135 #define CONFIG_SYS_MEMTEST_START 0x70000000
136 #define CONFIG_SYS_MEMTEST_END 0x70010000
137
138 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
139
140 #define CONFIG_CMDLINE_EDITING
141
142 /* Physical Memory Map */
143 #define CONFIG_NR_DRAM_BANKS 1
144 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
145 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
146
147 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
148 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
149 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
150
151 #define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153 #define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
155
156 /* FLASH and environment organization */
157 #define CONFIG_SYS_NO_FLASH
158
159 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
160 #define CONFIG_ENV_SIZE (8 * 1024)
161 #define CONFIG_ENV_IS_IN_MMC
162 #define CONFIG_SYS_MMC_ENV_DEV 0
163
164 #endif /* __CONFIG_H */