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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/mx53loco.h
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
5 * Configuration settings for Freescale MX53 low cost board.
7 * SPDX-License-Identifier: GPL-2.0+
15 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
17 #include <asm/arch/imx-regs.h>
19 #define CONFIG_CMDLINE_TAG
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_INITRD_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28 #define CONFIG_MXC_GPIO
29 #define CONFIG_REVISION_TAG
31 #define CONFIG_MXC_UART
32 #define CONFIG_MXC_UART_BASE UART1_BASE
35 #define CONFIG_FSL_ESDHC
36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
37 #define CONFIG_SYS_FSL_ESDHC_NUM 2
39 #define CONFIG_GENERIC_MMC
40 #define CONFIG_DOS_PARTITION
45 #define CONFIG_FEC_MXC
46 #define IMX_FEC_BASE FEC_BASE_ADDR
47 #define CONFIG_FEC_MXC_PHYADDR 0x1F
50 #define CONFIG_USB_EHCI
51 #define CONFIG_USB_EHCI_MX5
52 #define CONFIG_USB_HOST_ETHER
53 #define CONFIG_USB_ETHER_ASIX
54 #define CONFIG_USB_ETHER_MCS7830
55 #define CONFIG_USB_ETHER_SMSC95XX
56 #define CONFIG_MXC_USB_PORT 1
57 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
58 #define CONFIG_MXC_USB_FLAGS 0
61 #define CONFIG_SYS_I2C
62 #define CONFIG_SYS_I2C_MXC
63 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
64 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
65 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
69 #define CONFIG_POWER_I2C
70 #define CONFIG_DIALOG_POWER
71 #define CONFIG_POWER_FSL
72 #define CONFIG_POWER_FSL_MC13892
73 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
74 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
76 /* allow to overwrite serial and ethaddr */
77 #define CONFIG_ENV_OVERWRITE
78 #define CONFIG_CONS_INDEX 1
79 #define CONFIG_BAUDRATE 115200
81 /* Command definition */
82 #define CONFIG_SUPPORT_RAW_INITRD
85 #define CONFIG_ETHPRIME "FEC0"
87 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
88 #define CONFIG_SYS_TEXT_BASE 0x77800000
90 #define CONFIG_EXTRA_ENV_SETTINGS \
93 "fdt_addr=0x71000000\0" \
98 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
99 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
101 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
102 "bootscript=echo Running bootscript from mmc ...; " \
104 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
105 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
106 "mmcboot=echo Booting from mmc ...; " \
108 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
109 "if run loadfdt; then " \
110 "bootz ${loadaddr} - ${fdt_addr}; " \
112 "if test ${boot_fdt} = try; then " \
115 "echo WARN: Cannot load the DT; " \
121 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
123 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
124 "netboot=echo Booting from net ...; " \
126 "if test ${ip_dyn} = yes; then " \
127 "setenv get_cmd dhcp; " \
129 "setenv get_cmd tftp; " \
131 "${get_cmd} ${image}; " \
132 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
133 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
134 "bootz ${loadaddr} - ${fdt_addr}; " \
136 "if test ${boot_fdt} = try; then " \
139 "echo ERROR: Cannot load the DT; " \
147 #define CONFIG_BOOTCOMMAND \
148 "mmc dev ${mmcdev}; if mmc rescan; then " \
149 "if run loadbootscript; then " \
152 "if run loadimage; then " \
154 "else run netboot; " \
157 "else run netboot; fi"
159 #define CONFIG_ARP_TIMEOUT 200UL
161 /* Miscellaneous configurable options */
162 #define CONFIG_SYS_LONGHELP /* undef to save memory */
163 #define CONFIG_AUTO_COMPLETE
164 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
166 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
167 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
169 #define CONFIG_SYS_MEMTEST_START 0x70000000
170 #define CONFIG_SYS_MEMTEST_END 0x70010000
172 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
174 #define CONFIG_CMDLINE_EDITING
176 /* Physical Memory Map */
177 #define CONFIG_NR_DRAM_BANKS 2
178 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
179 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
180 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
181 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
182 #define PHYS_SDRAM_SIZE (gd->ram_size)
184 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
185 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
186 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
188 #define CONFIG_SYS_INIT_SP_OFFSET \
189 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
190 #define CONFIG_SYS_INIT_SP_ADDR \
191 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
193 /* FLASH and environment organization */
194 #define CONFIG_SYS_NO_FLASH
196 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
197 #define CONFIG_ENV_SIZE (8 * 1024)
198 #define CONFIG_ENV_IS_IN_MMC
199 #define CONFIG_SYS_MMC_ENV_DEV 0
201 #define CONFIG_CMD_SATA
202 #ifdef CONFIG_CMD_SATA
203 #define CONFIG_DWC_AHSATA
204 #define CONFIG_SYS_SATA_MAX_DEVICE 1
205 #define CONFIG_DWC_AHSATA_PORT_ID 0
206 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
208 #define CONFIG_LIBATA
211 /* Framebuffer and LCD */
212 #define CONFIG_PREBOOT
213 #define CONFIG_VIDEO_IPUV3
214 #define CONFIG_VIDEO_BMP_RLE8
215 #define CONFIG_SPLASH_SCREEN
216 #define CONFIG_BMP_16BPP
217 #define CONFIG_VIDEO_LOGO
218 #define CONFIG_IPUV3_CLK 200000000
220 #endif /* __CONFIG_H */