include/configs/mx53smd.h

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the MX53SMD Freescale board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #define CONFIG_MACH_TYPE        MACH_TYPE_MX53_SMD
  13
  14 #include <asm/arch/imx-regs.h>
  15
  16 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  17 #define CONFIG_SETUP_MEMORY_TAGS
  18 #define CONFIG_INITRD_TAG
  19 #define CONFIG_REVISION_TAG
  20
  21 #define CONFIG_SYS_FSL_CLK
  22
  23 /* Size of malloc() pool */
  24 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  25
  26 #define CONFIG_MXC_GPIO
  27
  28 #define CONFIG_MXC_UART
  29 #define CONFIG_MXC_UART_BASE    UART1_BASE
  30
  31 /* I2C Configs */
  32 #define CONFIG_SYS_I2C
  33 #define CONFIG_SYS_I2C_MXC
  34 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  35 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  36 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  37
  38 /* MMC Configs */
  39 #define CONFIG_FSL_ESDHC
  40 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  41 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  42
  43 /* Eth Configs */
  44 #define CONFIG_HAS_ETH1
  45 #define CONFIG_MII
  46
  47 #define CONFIG_FEC_MXC
  48 #define IMX_FEC_BASE    FEC_BASE_ADDR
  49 #define CONFIG_FEC_MXC_PHYADDR  0x1F
  50
  51 /* allow to overwrite serial and ethaddr */
  52 #define CONFIG_ENV_OVERWRITE
  53 #define CONFIG_CONS_INDEX               1
  54
  55 /* Command definition */
  56
  57 #define CONFIG_ETHPRIME         "FEC0"
  58
  59 #define CONFIG_LOADADDR         0x70800000      /* loadaddr env var */
  60 #define CONFIG_SYS_TEXT_BASE    0x77800000
  61
  62 #define CONFIG_EXTRA_ENV_SETTINGS \
  63         "script=boot.scr\0" \
  64         "uimage=uImage\0" \
  65         "mmcdev=0\0" \
  66         "mmcpart=2\0" \
  67         "mmcroot=/dev/mmcblk0p3 rw\0" \
  68         "mmcrootfstype=ext3 rootwait\0" \
  69         "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
  70                 "root=${mmcroot} " \
  71                 "rootfstype=${mmcrootfstype}\0" \
  72         "loadbootscript=" \
  73                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  74         "bootscript=echo Running bootscript from mmc ...; " \
  75                 "source\0" \
  76         "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
  77         "mmcboot=echo Booting from mmc ...; " \
  78                 "run mmcargs; " \
  79                 "bootm\0" \
  80         "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
  81                 "root=/dev/nfs " \
  82                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  83         "netboot=echo Booting from net ...; " \
  84                 "run netargs; " \
  85                 "dhcp ${uimage}; bootm\0" \
  86
  87 #define CONFIG_BOOTCOMMAND \
  88         "mmc dev ${mmcdev}; if mmc rescan; then " \
  89                 "if run loadbootscript; then " \
  90                         "run bootscript; " \
  91                 "else " \
  92                         "if run loaduimage; then " \
  93                                 "run mmcboot; " \
  94                         "else run netboot; " \
  95                         "fi; " \
  96                 "fi; " \
  97         "else run netboot; fi"
  98 #define CONFIG_ARP_TIMEOUT      200UL
  99
 100 /* Miscellaneous configurable options */
 101 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 102 #define CONFIG_AUTO_COMPLETE
 103
 104 #define CONFIG_SYS_MEMTEST_START       0x70000000
 105 #define CONFIG_SYS_MEMTEST_END         0x70010000
 106
 107 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 108
 109 #define CONFIG_CMDLINE_EDITING
 110
 111 /* Physical Memory Map */
 112 #define CONFIG_NR_DRAM_BANKS    2
 113 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
 114 #define PHYS_SDRAM_1_SIZE       (512 * 1024 * 1024)
 115 #define PHYS_SDRAM_2            CSD1_BASE_ADDR
 116 #define PHYS_SDRAM_2_SIZE       (512 * 1024 * 1024)
 117 #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
 118
 119 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
 120 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
 121 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
 122
 123 #define CONFIG_SYS_INIT_SP_OFFSET \
 124         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 125 #define CONFIG_SYS_INIT_SP_ADDR \
 126         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 127
 128 /* environment organization */
 129 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
 130 #define CONFIG_ENV_SIZE        (8 * 1024)
 131 #define CONFIG_SYS_MMC_ENV_DEV 0
 132
 133 #endif                          /* __CONFIG_H */