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1 /*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the MX53SMD Freescale board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
13
14 #include <asm/arch/imx-regs.h>
15
16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
20
21 #define CONFIG_SYS_FSL_CLK
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART1_BASE
28
29 /* I2C Configs */
30 #define CONFIG_SYS_I2C
31 #define CONFIG_SYS_I2C_MXC
32 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
33 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
34 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
35
36 /* MMC Configs */
37 #define CONFIG_FSL_ESDHC
38 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
39 #define CONFIG_SYS_FSL_ESDHC_NUM 1
40
41 /* Eth Configs */
42 #define CONFIG_HAS_ETH1
43 #define CONFIG_MII
44
45 #define CONFIG_FEC_MXC
46 #define IMX_FEC_BASE FEC_BASE_ADDR
47 #define CONFIG_FEC_MXC_PHYADDR 0x1F
48
49 /* allow to overwrite serial and ethaddr */
50 #define CONFIG_ENV_OVERWRITE
51 #define CONFIG_CONS_INDEX 1
52
53 /* Command definition */
54
55 #define CONFIG_ETHPRIME "FEC0"
56
57 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
58
59 #define CONFIG_EXTRA_ENV_SETTINGS \
60 "script=boot.scr\0" \
61 "uimage=uImage\0" \
62 "mmcdev=0\0" \
63 "mmcpart=2\0" \
64 "mmcroot=/dev/mmcblk0p3 rw\0" \
65 "mmcrootfstype=ext3 rootwait\0" \
66 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
67 "root=${mmcroot} " \
68 "rootfstype=${mmcrootfstype}\0" \
69 "loadbootscript=" \
70 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
71 "bootscript=echo Running bootscript from mmc ...; " \
72 "source\0" \
73 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
74 "mmcboot=echo Booting from mmc ...; " \
75 "run mmcargs; " \
76 "bootm\0" \
77 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
78 "root=/dev/nfs " \
79 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
80 "netboot=echo Booting from net ...; " \
81 "run netargs; " \
82 "dhcp ${uimage}; bootm\0" \
83
84 #define CONFIG_BOOTCOMMAND \
85 "mmc dev ${mmcdev}; if mmc rescan; then " \
86 "if run loadbootscript; then " \
87 "run bootscript; " \
88 "else " \
89 "if run loaduimage; then " \
90 "run mmcboot; " \
91 "else run netboot; " \
92 "fi; " \
93 "fi; " \
94 "else run netboot; fi"
95 #define CONFIG_ARP_TIMEOUT 200UL
96
97 /* Miscellaneous configurable options */
98
99 #define CONFIG_SYS_MEMTEST_START 0x70000000
100 #define CONFIG_SYS_MEMTEST_END 0x70010000
101
102 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
103
104 /* Physical Memory Map */
105 #define CONFIG_NR_DRAM_BANKS 2
106 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
107 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
108 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
109 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
110 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
111
112 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
113 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
114 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
115
116 #define CONFIG_SYS_INIT_SP_OFFSET \
117 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
118 #define CONFIG_SYS_INIT_SP_ADDR \
119 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
120
121 /* environment organization */
122 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
123 #define CONFIG_ENV_SIZE (8 * 1024)
124 #define CONFIG_SYS_MMC_ENV_DEV 0
125
126 #endif /* __CONFIG_H */