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1 /*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __MX6QSABRESD_CONFIG_H
10 #define __MX6QSABRESD_CONFIG_H
11
12 #ifdef CONFIG_SPL
13 #include "imx6_spl.h"
14 #endif
15
16 #define CONFIG_MACH_TYPE 3980
17 #define CONFIG_MXC_UART_BASE UART1_BASE
18 #define CONSOLE_DEV "ttymxc0"
19 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
20
21 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
22
23 #include "mx6sabre_common.h"
24
25 #define CONFIG_SYS_FSL_USDHC_NUM 3
26 #if defined(CONFIG_ENV_IS_IN_MMC)
27 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
28 #endif
29
30 #define CONFIG_CMD_PCI
31 #ifdef CONFIG_CMD_PCI
32 #define CONFIG_PCI_PNP
33 #define CONFIG_PCI_SCAN_SHOW
34 #define CONFIG_PCIE_IMX
35 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
36 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
37 #endif
38
39 /* I2C Configs */
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
45 #define CONFIG_SYS_I2C_SPEED 100000
46
47 /* PMIC */
48 #define CONFIG_POWER
49 #define CONFIG_POWER_I2C
50 #define CONFIG_POWER_PFUZE100
51 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
52
53 /* USB Configs */
54 #ifdef CONFIG_CMD_USB
55 #define CONFIG_USB_EHCI
56 #define CONFIG_USB_EHCI_MX6
57 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
58 #define CONFIG_USB_HOST_ETHER
59 #define CONFIG_USB_ETHER_ASIX
60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
61 #define CONFIG_MXC_USB_FLAGS 0
62 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
63 #endif
64
65 #endif /* __MX6QSABRESD_CONFIG_H */