include/configs/mx6sxsabresd.h

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the Freescale i.MX6SX Sabresd board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include "mx6_common.h"
  13
  14 #ifdef CONFIG_SPL
  15 #include "imx6_spl.h"
  16 #endif
  17
  18 /* Size of malloc() pool */
  19 #define CONFIG_SYS_MALLOC_LEN           (3 * SZ_1M)
  20
  21 #define CONFIG_MXC_UART
  22 #define CONFIG_MXC_UART_BASE            UART1_BASE
  23
  24 #ifdef CONFIG_IMX_BOOTAUX
  25 /* Set to QSPI2 B flash at default */
  26 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
  27
  28 #define UPDATE_M4_ENV \
  29         "m4image=m4_qspi.bin\0" \
  30         "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
  31         "update_m4_from_sd=" \
  32                 "if sf probe 1:0; then " \
  33                         "if run loadm4image; then " \
  34                                 "setexpr fw_sz ${filesize} + 0xffff; " \
  35                                 "setexpr fw_sz ${fw_sz} / 0x10000; "    \
  36                                 "setexpr fw_sz ${fw_sz} * 0x10000; "    \
  37                                 "sf erase 0x0 ${fw_sz}; " \
  38                                 "sf write ${loadaddr} 0x0 ${filesize}; " \
  39                         "fi; " \
  40                 "fi\0" \
  41         "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
  42 #else
  43 #define UPDATE_M4_ENV ""
  44 #endif
  45
  46 #define CONFIG_EXTRA_ENV_SETTINGS \
  47         UPDATE_M4_ENV \
  48         "script=boot.scr\0" \
  49         "image=zImage\0" \
  50         "console=ttymxc0\0" \
  51         "fdt_high=0xffffffff\0" \
  52         "initrd_high=0xffffffff\0" \
  53         "fdt_file=imx6sx-sdb.dtb\0" \
  54         "fdt_addr=0x88000000\0" \
  55         "boot_fdt=try\0" \
  56         "ip_dyn=yes\0" \
  57         "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
  58         "mmcdev=2\0" \
  59         "mmcpart=1\0" \
  60         "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
  61         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  62                 "root=${mmcroot}\0" \
  63         "loadbootscript=" \
  64                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  65         "bootscript=echo Running bootscript from mmc ...; " \
  66                 "source\0" \
  67         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  68         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  69         "mmcboot=echo Booting from mmc ...; " \
  70                 "run mmcargs; " \
  71                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  72                         "if run loadfdt; then " \
  73                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  74                         "else " \
  75                                 "if test ${boot_fdt} = try; then " \
  76                                         "bootz; " \
  77                                 "else " \
  78                                         "echo WARN: Cannot load the DT; " \
  79                                 "fi; " \
  80                         "fi; " \
  81                 "else " \
  82                         "bootz; " \
  83                 "fi;\0" \
  84         "netargs=setenv bootargs console=${console},${baudrate} " \
  85                 "root=/dev/nfs " \
  86         "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  87                 "netboot=echo Booting from net ...; " \
  88                 "run netargs; " \
  89                 "if test ${ip_dyn} = yes; then " \
  90                         "setenv get_cmd dhcp; " \
  91                 "else " \
  92                         "setenv get_cmd tftp; " \
  93                 "fi; " \
  94                 "${get_cmd} ${image}; " \
  95                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  96                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  97                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  98                         "else " \
  99                                 "if test ${boot_fdt} = try; then " \
 100                                         "bootz; " \
 101                                 "else " \
 102                                         "echo WARN: Cannot load the DT; " \
 103                                 "fi; " \
 104                         "fi; " \
 105                 "else " \
 106                         "bootz; " \
 107                 "fi;\0"
 108
 109 #define CONFIG_BOOTCOMMAND \
 110            "mmc dev ${mmcdev};" \
 111            "mmc dev ${mmcdev}; if mmc rescan; then " \
 112                    "if run loadbootscript; then " \
 113                            "run bootscript; " \
 114                    "else " \
 115                            "if run loadimage; then " \
 116                                    "run mmcboot; " \
 117                            "else run netboot; " \
 118                            "fi; " \
 119                    "fi; " \
 120            "else run netboot; fi"
 121
 122 /* Miscellaneous configurable options */
 123 #define CONFIG_SYS_MEMTEST_START        0x80000000
 124 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000)
 125
 126 /* Physical Memory Map */
 127 #define CONFIG_NR_DRAM_BANKS            1
 128 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 129
 130 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 131 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 132 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 133
 134 #define CONFIG_SYS_INIT_SP_OFFSET \
 135         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 136 #define CONFIG_SYS_INIT_SP_ADDR \
 137         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 138
 139 /* MMC Configuration */
 140 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
 141
 142 /* I2C Configs */
 143 #define CONFIG_SYS_I2C
 144 #define CONFIG_SYS_I2C_MXC
 145 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 146 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 147 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 148 #define CONFIG_SYS_I2C_SPEED              100000
 149
 150 /* PMIC */
 151 #define CONFIG_POWER
 152 #define CONFIG_POWER_I2C
 153 #define CONFIG_POWER_PFUZE100
 154 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
 155
 156 /* Network */
 157 #define CONFIG_FEC_MXC
 158 #define CONFIG_MII
 159
 160 #define IMX_FEC_BASE                    ENET_BASE_ADDR
 161 #define CONFIG_FEC_MXC_PHYADDR          0x1
 162
 163 #define CONFIG_FEC_XCV_TYPE             RGMII
 164 #define CONFIG_ETHPRIME                 "FEC"
 165
 166 #define CONFIG_PHY_ATHEROS
 167
 168 #ifdef CONFIG_CMD_USB
 169 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 170 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 171 #define CONFIG_MXC_USB_FLAGS   0
 172 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 173 #endif
 174
 175 #ifdef CONFIG_CMD_PCI
 176 #define CONFIG_PCI_SCAN_SHOW
 177 #define CONFIG_PCIE_IMX
 178 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(2, 0)
 179 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(2, 1)
 180 #endif
 181
 182 #define CONFIG_IMX_THERMAL
 183
 184 #ifdef CONFIG_FSL_QSPI
 185 #define CONFIG_SYS_FSL_QSPI_LE
 186 #define CONFIG_SYS_FSL_QSPI_AHB
 187 #ifdef CONFIG_MX6SX_SABRESD_REVA
 188 #define FSL_QSPI_FLASH_SIZE             SZ_16M
 189 #else
 190 #define FSL_QSPI_FLASH_SIZE             SZ_32M
 191 #endif
 192 #define FSL_QSPI_FLASH_NUM              2
 193 #endif
 194
 195 #ifndef CONFIG_SPL_BUILD
 196 #ifdef CONFIG_VIDEO
 197 #define CONFIG_VIDEO_MXS
 198 #define CONFIG_VIDEO_LOGO
 199 #define CONFIG_SPLASH_SCREEN
 200 #define CONFIG_SPLASH_SCREEN_ALIGN
 201 #define CONFIG_BMP_16BPP
 202 #define CONFIG_VIDEO_BMP_RLE8
 203 #define CONFIG_VIDEO_BMP_LOGO
 204 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
 205 #endif
 206 #endif
 207
 208 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 209 #define CONFIG_ENV_SIZE                 SZ_8K
 210
 211 #define CONFIG_SYS_FSL_USDHC_NUM        3
 212 #if defined(CONFIG_ENV_IS_IN_MMC)
 213 #define CONFIG_SYS_MMC_ENV_DEV          2  /*USDHC4*/
 214 #endif
 215
 216 #endif                          /* __CONFIG_H */