]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/mx7dsabresd.h
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
[people/ms/u-boot.git] / include / configs / mx7dsabresd.h
1 /*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX7D SABRESD board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __MX7D_SABRESD_CONFIG_H
10 #define __MX7D_SABRESD_CONFIG_H
11
12 #include "mx7_common.h"
13
14 #define CONFIG_DBG_MONITOR
15 #define PHYS_SDRAM_SIZE SZ_1G
16
17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
18
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
21
22 #define CONFIG_BOARD_EARLY_INIT_F
23 #define CONFIG_BOARD_LATE_INIT
24
25 /* Uncomment to enable secure boot support */
26 /* #define CONFIG_SECURE_BOOT */
27 #define CONFIG_CSF_SIZE 0x4000
28
29 /* Network */
30 #define CONFIG_CMD_MII
31 #define CONFIG_FEC_MXC
32 #define CONFIG_MII
33 #define CONFIG_FEC_XCV_TYPE RGMII
34 #define CONFIG_ETHPRIME "FEC"
35 #define CONFIG_FEC_MXC_PHYADDR 0
36
37 #define CONFIG_PHYLIB
38 #define CONFIG_PHY_BROADCOM
39 /* ENET1 */
40 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
41
42 /* MMC Config*/
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44
45 /* PMIC */
46 #define CONFIG_POWER
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_PFUZE3000
49 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
50
51 #undef CONFIG_BOOTM_NETBSD
52 #undef CONFIG_BOOTM_PLAN9
53 #undef CONFIG_BOOTM_RTEMS
54
55 #undef CONFIG_CMD_EXPORTENV
56 #undef CONFIG_CMD_IMPORTENV
57
58 /* I2C configs */
59 #define CONFIG_CMD_I2C
60 #define CONFIG_SYS_I2C
61 #define CONFIG_SYS_I2C_MXC
62 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
63 #define CONFIG_SYS_I2C_SPEED 100000
64
65 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
66 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
67
68 #ifdef CONFIG_IMX_BOOTAUX
69 /* Set to QSPI1 A flash at default */
70 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
71 #define CONFIG_CMD_SETEXPR
72
73 #define UPDATE_M4_ENV \
74 "m4image=m4_qspi.bin\0" \
75 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
76 "update_m4_from_sd=" \
77 "if sf probe 0:0; then " \
78 "if run loadm4image; then " \
79 "setexpr fw_sz ${filesize} + 0xffff; " \
80 "setexpr fw_sz ${fw_sz} / 0x10000; " \
81 "setexpr fw_sz ${fw_sz} * 0x10000; " \
82 "sf erase 0x0 ${fw_sz}; " \
83 "sf write ${loadaddr} 0x0 ${filesize}; " \
84 "fi; " \
85 "fi\0" \
86 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
87 #else
88 #define UPDATE_M4_ENV ""
89 #endif
90
91 #define CONFIG_MFG_ENV_SETTINGS \
92 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
93 "rdinit=/linuxrc " \
94 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
95 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
96 "g_mass_storage.iSerialNumber=\"\" "\
97 "clk_ignore_unused "\
98 "\0" \
99 "initrd_addr=0x83800000\0" \
100 "initrd_high=0xffffffff\0" \
101 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
102
103 #define CONFIG_DFU_ENV_SETTINGS \
104 "dfu_alt_info=image raw 0 0x800000;"\
105 "u-boot raw 0 0x4000;"\
106 "bootimg part 0 1;"\
107 "rootfs part 0 2\0" \
108
109 #define CONFIG_EXTRA_ENV_SETTINGS \
110 UPDATE_M4_ENV \
111 CONFIG_MFG_ENV_SETTINGS \
112 CONFIG_DFU_ENV_SETTINGS \
113 "script=boot.scr\0" \
114 "image=zImage\0" \
115 "console=ttymxc0\0" \
116 "fdt_high=0xffffffff\0" \
117 "initrd_high=0xffffffff\0" \
118 "fdt_file=imx7d-sdb.dtb\0" \
119 "fdt_addr=0x83000000\0" \
120 "boot_fdt=try\0" \
121 "ip_dyn=yes\0" \
122 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
123 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
124 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
125 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
126 "mmcautodetect=yes\0" \
127 "mmcargs=setenv bootargs console=${console},${baudrate} " \
128 "root=${mmcroot}\0" \
129 "loadbootscript=" \
130 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
131 "bootscript=echo Running bootscript from mmc ...; " \
132 "source\0" \
133 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
134 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
135 "mmcboot=echo Booting from mmc ...; " \
136 "run mmcargs; " \
137 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
138 "if run loadfdt; then " \
139 "bootz ${loadaddr} - ${fdt_addr}; " \
140 "else " \
141 "if test ${boot_fdt} = try; then " \
142 "bootz; " \
143 "else " \
144 "echo WARN: Cannot load the DT; " \
145 "fi; " \
146 "fi; " \
147 "else " \
148 "bootz; " \
149 "fi;\0" \
150 "netargs=setenv bootargs console=${console},${baudrate} " \
151 "root=/dev/nfs " \
152 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
153 "netboot=echo Booting from net ...; " \
154 "run netargs; " \
155 "if test ${ip_dyn} = yes; then " \
156 "setenv get_cmd dhcp; " \
157 "else " \
158 "setenv get_cmd tftp; " \
159 "fi; " \
160 "${get_cmd} ${image}; " \
161 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
162 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
163 "bootz ${loadaddr} - ${fdt_addr}; " \
164 "else " \
165 "if test ${boot_fdt} = try; then " \
166 "bootz; " \
167 "else " \
168 "echo WARN: Cannot load the DT; " \
169 "fi; " \
170 "fi; " \
171 "else " \
172 "bootz; " \
173 "fi;\0"
174
175 #define CONFIG_BOOTCOMMAND \
176 "mmc dev ${mmcdev};" \
177 "mmc dev ${mmcdev}; if mmc rescan; then " \
178 "if run loadbootscript; then " \
179 "run bootscript; " \
180 "else " \
181 "if run loadimage; then " \
182 "run mmcboot; " \
183 "else run netboot; " \
184 "fi; " \
185 "fi; " \
186 "else run netboot; fi"
187
188 #define CONFIG_CMD_MEMTEST
189 #define CONFIG_SYS_MEMTEST_START 0x80000000
190 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
191
192 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
193 #define CONFIG_SYS_HZ 1000
194
195 #define CONFIG_STACKSIZE SZ_128K
196
197 /* Physical Memory Map */
198 #define CONFIG_NR_DRAM_BANKS 1
199 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
200
201 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
202 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
203 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
204
205 #define CONFIG_SYS_INIT_SP_OFFSET \
206 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
207 #define CONFIG_SYS_INIT_SP_ADDR \
208 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
209
210 /* FLASH and environment organization */
211 #define CONFIG_SYS_NO_FLASH
212 #define CONFIG_ENV_SIZE SZ_8K
213 #define CONFIG_ENV_IS_IN_MMC
214
215 /*
216 * If want to use nand, define CONFIG_NAND_MXS and rework board
217 * to support nand, since emmc has pin conflicts with nand
218 */
219 #ifdef CONFIG_NAND_MXS
220 #define CONFIG_CMD_NAND
221 #define CONFIG_CMD_NAND_TRIMFFS
222
223 /* NAND stuff */
224 #define CONFIG_SYS_MAX_NAND_DEVICE 1
225 #define CONFIG_SYS_NAND_BASE 0x40000000
226 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
227 #define CONFIG_SYS_NAND_ONFI_DETECTION
228
229 /* DMA stuff, needed for GPMI/MXS NAND support */
230 #define CONFIG_APBH_DMA
231 #define CONFIG_APBH_DMA_BURST
232 #define CONFIG_APBH_DMA_BURST8
233 #endif
234
235 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
236 #ifdef CONFIG_NAND_MXS
237 #define CONFIG_SYS_FSL_USDHC_NUM 1
238 #else
239 #define CONFIG_SYS_FSL_USDHC_NUM 2
240 #endif
241
242 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
243 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
244 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
245
246 /* USB Configs */
247 #define CONFIG_CMD_USB
248 #define CONFIG_USB_EHCI
249 #define CONFIG_USB_EHCI_MX7
250 #define CONFIG_USB_STORAGE
251 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
252 #define CONFIG_USB_HOST_ETHER
253 #define CONFIG_USB_ETHER_ASIX
254 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
255 #define CONFIG_MXC_USB_FLAGS 0
256 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
257
258 #define CONFIG_IMX_THERMAL
259
260 #define CONFIG_CI_UDC
261 #define CONFIG_USBD_HS
262 #define CONFIG_USB_GADGET_DUALSPEED
263
264 #define CONFIG_CMD_USB_MASS_STORAGE
265 #define CONFIG_USB_FUNCTION_MASS_STORAGE
266 #define CONFIG_USB_GADGET_DOWNLOAD
267 #define CONFIG_USB_GADGET_VBUS_DRAW 2
268
269 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
270 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
271 #define CONFIG_G_DNL_MANUFACTURER "FSL"
272
273 /* USB Device Firmware Update support */
274 #define CONFIG_CMD_DFU
275 #define CONFIG_USB_FUNCTION_DFU
276 #define CONFIG_DFU_MMC
277 #define CONFIG_DFU_RAM
278
279 #define CONFIG_VIDEO
280 #ifdef CONFIG_VIDEO
281 #define CONFIG_CFB_CONSOLE
282 #define CONFIG_VIDEO_MXS
283 #define CONFIG_VIDEO_LOGO
284 #define CONFIG_VIDEO_SW_CURSOR
285 #define CONFIG_VGA_AS_SINGLE_DEVICE
286 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
287 #define CONFIG_SPLASH_SCREEN
288 #define CONFIG_SPLASH_SCREEN_ALIGN
289 #define CONFIG_CMD_BMP
290 #define CONFIG_BMP_16BPP
291 #define CONFIG_VIDEO_BMP_RLE8
292 #define CONFIG_VIDEO_BMP_LOGO
293 #endif
294
295 #ifdef CONFIG_FSL_QSPI
296 #define CONFIG_CMD_SF
297 #define CONFIG_SPI_FLASH
298 #define CONFIG_SPI_FLASH_MACRONIX
299 #define CONFIG_SPI_FLASH_BAR
300 #define CONFIG_SF_DEFAULT_BUS 0
301 #define CONFIG_SF_DEFAULT_CS 0
302 #define CONFIG_SF_DEFAULT_SPEED 40000000
303 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
304 #define FSL_QSPI_FLASH_NUM 1
305 #define FSL_QSPI_FLASH_SIZE SZ_64M
306 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
307 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
308 #endif
309
310 #endif /* __CONFIG_H */