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1 /*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19 #ifndef __CONFIGS_MXS_H__
20 #define __CONFIGS_MXS_H__
21
22 /*
23 * Includes
24 */
25
26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
30 #endif
31
32 #include <asm/arch/regs-base.h>
33
34 #if defined(CONFIG_MX23)
35 #include <asm/arch/iomux-mx23.h>
36 #elif defined(CONFIG_MX28)
37 #include <asm/arch/iomux-mx28.h>
38 #endif
39
40 /*
41 * CPU specifics
42 */
43
44 /* Startup hooks */
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_ARCH_MISC_INIT
47
48 /* SPL */
49 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
50 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
51 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
52 #define CONFIG_SPL_LIBGENERIC_SUPPORT
53 #define CONFIG_SPL_SERIAL_SUPPORT
54
55 /* Memory sizes */
56 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
57 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
58 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
59
60 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
61 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
62 #if defined(CONFIG_MX23)
63 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
64 #elif defined(CONFIG_MX28)
65 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
66 #endif
67
68 /* Point initial SP in SRAM so SPL can use it too. */
69 #define CONFIG_SYS_INIT_SP_OFFSET \
70 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
71 #define CONFIG_SYS_INIT_SP_ADDR \
72 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
73
74 /*
75 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
76 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
77 * binary. In case there was more of this mess, 0x100 bytes are skipped.
78 *
79 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
80 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
81 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
82 *
83 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
84 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
85 */
86 #define CONFIG_SYS_TEXT_BASE 0x40002000
87 #define CONFIG_SPL_TEXT_BASE 0x00001000
88
89 /* U-Boot general configuration */
90 #define CONFIG_SYS_LONGHELP
91 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
92 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
93 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
94 /* Boot argument buffer size */
95 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
96 #define CONFIG_CMDLINE_EDITING /* Command history etc */
97
98 /* Booting Linux */
99 #define CONFIG_CMDLINE_TAG
100 #define CONFIG_SETUP_MEMORY_TAGS
101
102 /*
103 * Drivers
104 */
105
106 /* APBH DMA */
107 #define CONFIG_APBH_DMA
108
109 /* GPIO */
110 #define CONFIG_MXS_GPIO
111
112 /*
113 * DUART Serial Driver.
114 * Conflicts with AUART driver which can be set by board.
115 */
116 #define CONFIG_PL011_SERIAL
117 #define CONFIG_PL011_CLOCK 24000000
118 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
119 #define CONFIG_CONS_INDEX 0
120 /* Default baudrate can be overridden by board! */
121 #ifndef CONFIG_BAUDRATE
122 #define CONFIG_BAUDRATE 115200
123 #endif
124
125 /* FEC Ethernet on SoC */
126 #ifdef CONFIG_FEC_MXC
127 #define CONFIG_MII
128 #ifndef CONFIG_ETHPRIME
129 #define CONFIG_ETHPRIME "FEC0"
130 #endif
131 #ifndef CONFIG_FEC_XCV_TYPE
132 #define CONFIG_FEC_XCV_TYPE RMII
133 #endif
134 #endif
135
136 /* I2C */
137 #ifdef CONFIG_CMD_I2C
138 #define CONFIG_SYS_I2C
139 #define CONFIG_SYS_I2C_MXS
140 #define CONFIG_HARD_I2C
141 #ifndef CONFIG_SYS_I2C_SPEED
142 #define CONFIG_SYS_I2C_SPEED 400000
143 #endif
144 #endif
145
146 /* LCD */
147 #ifdef CONFIG_VIDEO
148 #define CONFIG_CFB_CONSOLE
149 #define CONFIG_VIDEO_MXS
150 #define CONFIG_VIDEO_SW_CURSOR
151 #define CONFIG_VGA_AS_SINGLE_DEVICE
152 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
153 #endif
154
155 /* MMC */
156 #ifdef CONFIG_CMD_MMC
157 #define CONFIG_MMC
158 #define CONFIG_GENERIC_MMC
159 #define CONFIG_BOUNCE_BUFFER
160 #define CONFIG_MXS_MMC
161 #endif
162
163 /* NAND */
164 #ifdef CONFIG_CMD_NAND
165 #define CONFIG_NAND_MXS
166 #define CONFIG_SYS_MAX_NAND_DEVICE 1
167 #define CONFIG_SYS_NAND_BASE 0x60000000
168 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
169 #endif
170
171 /* OCOTP */
172 #ifdef CONFIG_CMD_FUSE
173 #define CONFIG_MXS_OCOTP
174 #endif
175
176 /* SPI */
177 #ifdef CONFIG_CMD_SPI
178 #define CONFIG_HARD_SPI
179 #define CONFIG_MXS_SPI
180 #define CONFIG_SPI_HALF_DUPLEX
181 #endif
182
183 /* USB */
184 #ifdef CONFIG_CMD_USB
185 #define CONFIG_USB_EHCI
186 #define CONFIG_USB_EHCI_MXS
187 #define CONFIG_EHCI_IS_TDI
188 #endif
189
190 #endif /* __CONFIGS_MXS_H__ */