include/configs/nx25-ae250.h

   1 /*
   2  * Copyright (C) 2017 Andes Technology Corporation
   3  * Rick Chen, Andes Technology Corporation <rick@andestech.com>
   4  *
   5  * SPDX-License-Identifier: GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /*
  12  * CPU and Board Configuration Options
  13  */
  14 #define CONFIG_SKIP_LOWLEVEL_INIT
  15
  16 #define CONFIG_BOOTP_SEND_HOSTNAME
  17 #define CONFIG_BOOTP_SERVERIP
  18
  19 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
  20 #ifdef CONFIG_OF_CONTROL
  21 #undef CONFIG_OF_SEPARATE
  22 #define CONFIG_OF_EMBED
  23 #endif
  24 #endif
  25
  26 /*
  27  * Miscellaneous configurable options
  28  */
  29 #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size */
  30
  31 /*
  32  * Print Buffer Size
  33  */
  34 #define CONFIG_SYS_PBSIZE       \
  35         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  36
  37 /*
  38  * max number of command args
  39  */
  40 #define CONFIG_SYS_MAXARGS      16
  41
  42 /*
  43  * Boot Argument Buffer Size
  44  */
  45 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
  46
  47 /*
  48  * Size of malloc() pool
  49  * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
  50  */
  51 #define CONFIG_SYS_MALLOC_LEN   (512 << 10)
  52
  53 /*
  54  * Physical Memory Map
  55  */
  56 #define CONFIG_NR_DRAM_BANKS    2
  57 #define PHYS_SDRAM_0    0x00000000              /* SDRAM Bank #1 */
  58 #define PHYS_SDRAM_1    \
  59         (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)      /* SDRAM Bank #2 */
  60 #define PHYS_SDRAM_0_SIZE       0x20000000      /* 512 MB */
  61 #define PHYS_SDRAM_1_SIZE       0x20000000      /* 512 MB */
  62 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_0
  63
  64 /*
  65  * Serial console configuration
  66  */
  67 #define CONFIG_CONS_INDEX               1
  68 #define CONFIG_SYS_NS16550_SERIAL
  69 #ifndef CONFIG_DM_SERIAL
  70 #define CONFIG_SYS_NS16550_REG_SIZE     -4
  71 #endif
  72 #define CONFIG_SYS_NS16550_CLK          19660800
  73
  74 /*
  75  * SD (MMC) controller
  76  */
  77 #define CONFIG_FTSDC010_NUMBER          1
  78 #define CONFIG_FTSDC010_SDIO
  79
  80 /* Init Stack Pointer */
  81 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
  82                                         GENERATED_GBL_DATA_SIZE)
  83
  84 /*
  85  * Load address and memory test area should agree with
  86  * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
  87  */
  88 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* SDRAM */
  89
  90 /*
  91  * memtest works on 512 MB in DRAM
  92  */
  93 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_0
  94 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
  95
  96 /* environments */
  97 #define CONFIG_ENV_SPI_BUS              0
  98 #define CONFIG_ENV_SPI_CS               0
  99 #define CONFIG_ENV_SPI_MAX_HZ           50000000
 100 #define CONFIG_ENV_SPI_MODE             0
 101 #define CONFIG_ENV_SECT_SIZE            0x1000
 102 #define CONFIG_ENV_OVERWRITE
 103
 104 /* SPI FLASH */
 105 #define CONFIG_SF_DEFAULT_BUS           0
 106 #define CONFIG_SF_DEFAULT_CS            0
 107 #define CONFIG_SF_DEFAULT_SPEED         1000000
 108 #define CONFIG_SF_DEFAULT_MODE          0
 109
 110 /*
 111  * For booting Linux, the board info and command line data
 112  * have to be in the first 16 MB of memory, since this is
 113  * the maximum mapped by the Linux kernel during initialization.
 114  */
 115
 116 /* Initial Memory map for Linux*/
 117 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)
 118 /* Increase max gunzip size */
 119 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)
 120
 121 #endif /* __CONFIG_H */