include/configs/o2dnt-common.h

   1 /*
   2  *  Common configuration options for ifm camera boards
   3  *
   4  * (C) Copyright 2005
   5  * Sebastien Cazaux, ifm electronic gmbh
   6  *
   7  * (C) Copyright 2012
   8  * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __O2D_CONFIG_H
  14 #define __O2D_CONFIG_H
  15
  16 /*
  17  * High Level Configuration Options
  18  */
  19 #define CONFIG_MPC5200
  20 #define CONFIG_DISPLAY_BOARDINFO
  21
  22 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* running at 33.000000MHz */
  23
  24 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
  25 #if defined(CONFIG_CMD_KGDB)
  26 /* log base 2 of the above value */
  27 #define CONFIG_SYS_CACHELINE_SHIFT      5
  28 #endif
  29
  30 /*
  31 #define CONFIG_POST     (CONFIG_SYS_POST_MEMORY | \
  32                          CONFIG_SYS_POST_I2C)
  33 */
  34
  35 #ifdef CONFIG_POST
  36 /* preserve space for the post_word at end of on-chip SRAM */
  37 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
  38 #endif
  39
  40 /*
  41  * Serial console configuration
  42  */
  43 #define CONFIG_PSC_CONSOLE      5       /* console is on PSC5 */
  44 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  45 #define CONFIG_SYS_BAUDRATE_TABLE \
  46         { 9600, 19200, 38400, 57600, 115200, 230400 }
  47
  48 /*
  49  * PCI Mapping:
  50  * 0x40000000 - 0x4fffffff - PCI Memory
  51  * 0x50000000 - 0x50ffffff - PCI IO Space
  52  */
  53 #undef CONFIG_PCI
  54 #define CONFIG_PCI_PNP          1
  55
  56 #define CONFIG_PCI_MEM_BUS      0x40000000
  57 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  58 #define CONFIG_PCI_MEM_SIZE     0x10000000
  59
  60 #define CONFIG_PCI_IO_BUS       0x50000000
  61 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  62 #define CONFIG_PCI_IO_SIZE      0x01000000
  63
  64 #define CONFIG_SYS_XLB_PIPELINING       1
  65
  66 /* Partitions */
  67 #define CONFIG_MAC_PARTITION
  68 #define CONFIG_DOS_PARTITION
  69 #define CONFIG_ISO_PARTITION
  70
  71 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  72
  73 #define CONFIG_SYS_ALT_MEMTEST  /* Much more complex memory test */
  74
  75 /*
  76  * Supported commands
  77  */
  78 #define CONFIG_CMD_EEPROM
  79 #ifdef CONFIG_PCI
  80 #define CONFIG_CMD_PCI
  81 #endif
  82 #ifdef CONFIG_POST
  83 #define CONFIG_CMD_DIAG
  84 #endif
  85
  86 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
  87 /* Boot low with 16 or 32 MB Flash */
  88 #define CONFIG_SYS_LOWBOOT      1
  89 #elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
  90 #error "CONFIG_SYS_TEXT_BASE value is invalid"
  91 #endif
  92
  93 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
  94
  95 #define CONFIG_PREBOOT  "run master"
  96
  97 #undef  CONFIG_BOOTARGS
  98
  99 #if !defined(CONFIG_CONSOLE_DEV)
 100 #define CONFIG_CONSOLE_DEV      "ttyPSC1"
 101 #endif
 102
 103 /*
 104  * Default environment for booting old and new kernel versions
 105  */
 106 #define CONFIG_IFM_DEFAULT_ENV_OLD                                      \
 107         "flash_self_old=run ramargs addip addmem;"                      \
 108                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 109         "flash_nfs_old=run nfsargs addip addmem;"                       \
 110                 "bootm ${kernel_addr}\0"                                \
 111         "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"                \
 112                 "run nfsargs addip addmem;"                             \
 113                 "bootm ${kernel_addr_r}\0"
 114
 115 #define CONFIG_IFM_DEFAULT_ENV_NEW                                      \
 116         "fdt_addr_r=900000\0"                                           \
 117         "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0"        \
 118         "flash_self=run ramargs addip addtty addmisc;"                  \
 119                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
 120         "flash_nfs=run nfsargs addip addtty addmisc;"                   \
 121                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
 122         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 123                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
 124                 "run nfsargs addip addtty addmisc;"                     \
 125                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
 126
 127 #define CONFIG_IFM_DEFAULT_ENV_SETTINGS                                 \
 128         "IOpin=0x64\0"                                                  \
 129         "addip=setenv bootargs ${bootargs} "                            \
 130                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 131                 ":${hostname}:${netdev}:off panic=1\0"                  \
 132         "addmem=setenv bootargs ${bootargs} ${memlimit}\0"              \
 133         "addmisc=sete bootargs ${bootargs} ${miscargs}\0"               \
 134         "addtty=sete bootargs ${bootargs} console="                     \
 135                 CONFIG_CONSOLE_DEV ",${baudrate}\0"                     \
 136         "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
 137         "kernel_addr_r=600000\0"                                        \
 138         "initrd_high=0x03e00000\0"                                      \
 139         "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0"                      \
 140         "memtest=mtest 0x00100000 "__stringify(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
 141         "netdev=eth0\0"                                                 \
 142         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 143                 "nfsroot=${serverip}:${rootpath}\0"                     \
 144         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 145         "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
 146         "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
 147                 "cp.b ${fileaddr} ${linbot} ${filesize}\0"              \
 148         "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
 149         "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};"     \
 150                 "cp.b ${fileaddr} ${rambot} ${filesize}\0"              \
 151         "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0"  \
 152         "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};"     \
 153                 "cp.b ${fileaddr} ${jffbot} ${filesize}\0"              \
 154         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
 155         "uboname=" CONFIG_BOARD_NAME                                    \
 156                 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0"               \
 157         "progubo=tftp 200000 ${uboname};"                               \
 158                 "protect off ${ubobot} ${ubotop};"                      \
 159                 "erase ${ubobot} ${ubotop};"                            \
 160                 "cp.b ${fileaddr} ${ubobot} ${filesize}\0"              \
 161         "unlock=yes\0"                                                  \
 162         "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;"     \
 163                 "setenv bootdelay 1;"                                   \
 164                 "crc32 "__stringify(CONFIG_SYS_TEXT_BASE)" "            \
 165                         BOARD_POST_CRC32_END";"                         \
 166                 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
 167
 168 #define CONFIG_BOOTCOMMAND      "run post"
 169
 170 /*
 171  * IPB Bus clocking configuration.
 172  */
 173 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
 174
 175 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 176 /*
 177  * PCI Bus clocking configuration
 178  *
 179  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 180  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 181  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 182  */
 183 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2    /* define for 66MHz speed */
 184 #endif
 185
 186 /*
 187  * I2C configuration
 188  */
 189 #define CONFIG_HARD_I2C                 1       /* I2C with hardware support */
 190 #define CONFIG_SYS_I2C_MODULE           1       /* Select I2C module #1 or #2 */
 191 #define CONFIG_SYS_I2C_SPEED            100000  /* 100 kHz */
 192 #define CONFIG_SYS_I2C_SLAVE            0x7F
 193
 194 /*
 195  * EEPROM configuration:
 196  *
 197  * O2DNT board is equiped with Ramtron FRAM device FM24CL16
 198  * 16 Kib Ferroelectric Nonvolatile serial RAM memory
 199  * organized as 2048 x 8 bits and addressable as eight I2C devices
 200  * 0x50 ... 0x57 each 256 bytes in size
 201  *
 202  */
 203 #define CONFIG_SYS_I2C_FRAM
 204 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
 205 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 206 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 207 /*
 208  * There is no write delay with FRAM, write operations are performed at bus
 209  * speed. Thus, no status polling or write delay is needed.
 210  */
 211
 212 /*
 213  * Flash configuration
 214  */
 215 #define CONFIG_SYS_FLASH_CFI            1
 216 #define CONFIG_FLASH_CFI_DRIVER         1
 217 #define CONFIG_FLASH_16BIT
 218 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
 219 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
 220 #define CONFIG_SYS_FLASH_EMPTY_INFO
 221
 222 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks */
 223 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 224 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Erase Timeout (in ms) */
 225 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Write Timeout (in ms) */
 226 /* Timeout for Flash Clear Lock Bits (in ms) */
 227 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
 228 /* "Real" (hardware) sectors protection */
 229 #define CONFIG_SYS_FLASH_PROTECTION
 230
 231 /*
 232  * Environment settings
 233  */
 234 #define CONFIG_ENV_IS_IN_FLASH  1
 235 #define CONFIG_ENV_SIZE         0x20000
 236 #define CONFIG_ENV_SECT_SIZE    0x20000
 237 #define CONFIG_ENV_OVERWRITE    1
 238 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
 239
 240 /*
 241  * Memory map
 242  */
 243 #define CONFIG_SYS_MBAR         0xF0000000
 244 #define CONFIG_SYS_SDRAM_BASE   0x00000000
 245 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
 246
 247 /* Use SRAM until RAM will be available */
 248 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
 249 #ifdef CONFIG_POST
 250 /* preserve space for the post_word at end of on-chip SRAM */
 251 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
 252 #else
 253 /* End of used area in DPRAM */
 254 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
 255 #endif
 256
 257 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 258                                          GENERATED_GBL_DATA_SIZE)
 259 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 260
 261 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 262 #define CONFIG_SYS_MONITOR_LEN          (192 << 10) /* 192 kB for Monitor */
 263 #define CONFIG_SYS_MALLOC_LEN           (128 << 10) /* 128 kB for malloc() */
 264 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)   /* Initial map for Linux */
 265
 266 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 267 #define CONFIG_SYS_RAMBOOT              1
 268 #endif
 269
 270 /*
 271  * Ethernet configuration
 272  */
 273 #define CONFIG_MPC5xxx_FEC
 274 #define CONFIG_MPC5xxx_FEC_MII100
 275 #define CONFIG_PHY_ADDR                 0x00
 276 #define CONFIG_RESET_PHY_R
 277
 278 /*
 279  * GPIO configuration
 280  */
 281 #define CONFIG_SYS_GPIO_DATADIR         0x00000064 /* PSC1_2, PSC2_1,2 output */
 282 #define CONFIG_SYS_GPIO_OPENDRAIN       0x00000000 /* No open drain */
 283 #define CONFIG_SYS_GPIO_DATAVALUE       0x00000000 /* PSC1_1 to 1, rest to 0 */
 284 #define CONFIG_SYS_GPIO_ENABLE          0x00000064 /* PSC1_2, PSC2_1,2 enable */
 285
 286 /*
 287  * Miscellaneous configurable options
 288  */
 289 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 290 #define CONFIG_CMDLINE_EDITING
 291
 292 #if defined(CONFIG_CMD_KGDB)
 293 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 294 #else
 295 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
 296 #endif
 297 /* Print Buffer Size */
 298 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 299                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 300 /* max number of command args */
 301 #define CONFIG_SYS_MAXARGS              16
 302 /* Boot Argument Buffer Size */
 303 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 304
 305 /* default load address */
 306 #define CONFIG_SYS_LOAD_ADDR            0x100000
 307
 308 /* decrementer freq: 1 ms ticks */
 309
 310 /*
 311  * Various low-level settings
 312  */
 313 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 314 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 315
 316 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
 317 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 318 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
 319 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
 320
 321 #define CONFIG_BOARD_EARLY_INIT_R
 322
 323 #define CONFIG_SYS_CS_BURST             0x00000000
 324 #define CONFIG_SYS_CS_DEADCYCLE         0x33333333
 325
 326 /*
 327  * DT support
 328  */
 329 #define OF_CPU                  "PowerPC,5200@0"
 330 #define OF_SOC                  "soc5200@f0000000"
 331 #define OF_TBCLK                (bd->bi_busfreq / 4)
 332
 333 #endif /* __O2D_CONFIG_H */