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1 /*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * Configuration settings for the TI OMAP3530 Beagle board.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 /*
16 * High Level Configuration Options
17 */
18 #define CONFIG_OMAP 1 /* in a TI OMAP core */
19 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
20 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
21 #define CONFIG_OMAP_GPIO
22
23 #define CONFIG_SDRC /* The chip has SDRC controller */
24
25 #include <asm/arch/cpu.h> /* get chip and board defs */
26 #include <asm/arch/omap3.h>
27
28 /*
29 * Display CPU and Board information
30 */
31 #define CONFIG_DISPLAY_CPUINFO 1
32 #define CONFIG_DISPLAY_BOARDINFO 1
33
34 /* Clock Defines */
35 #define V_OSCK 26000000 /* Clock output from T2 */
36 #define V_SCLK (V_OSCK >> 1)
37
38 #define CONFIG_MISC_INIT_R
39
40 #define CONFIG_OF_LIBFDT
41 #define CONFIG_CMD_BOOTZ
42
43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS 1
45 #define CONFIG_INITRD_TAG 1
46 #define CONFIG_REVISION_TAG 1
47
48 /*
49 * Size of malloc() pool
50 */
51 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
52 /* Sector */
53 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
54
55 /*
56 * Hardware drivers
57 */
58
59 /*
60 * NS16550 Configuration
61 */
62 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
63
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_SERIAL
66 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
67 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
68
69 /*
70 * select serial console configuration
71 */
72 #define CONFIG_CONS_INDEX 3
73 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
74 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
75
76 /* allow to overwrite serial and ethaddr */
77 #define CONFIG_ENV_OVERWRITE
78 #define CONFIG_BAUDRATE 115200
79 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
80 115200}
81 #define CONFIG_GENERIC_MMC 1
82 #define CONFIG_MMC 1
83 #define CONFIG_OMAP_HSMMC 1
84 #define CONFIG_DOS_PARTITION 1
85
86 /* Status LED */
87 #define CONFIG_STATUS_LED 1
88 #define CONFIG_BOARD_SPECIFIC_LED 1
89 #define STATUS_LED_BIT 0x01
90 #define STATUS_LED_STATE STATUS_LED_ON
91 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
92 #define STATUS_LED_BIT1 0x02
93 #define STATUS_LED_STATE1 STATUS_LED_ON
94 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
95 #define STATUS_LED_BOOT STATUS_LED_BIT
96 #define STATUS_LED_GREEN STATUS_LED_BIT1
97
98 /* Enable Multi Bus support for I2C */
99 #define CONFIG_I2C_MULTI_BUS 1
100
101 /* Probe all devices */
102 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
103
104 /* USB */
105 #define CONFIG_MUSB_GADGET
106 #define CONFIG_USB_MUSB_OMAP2PLUS
107 #define CONFIG_MUSB_PIO_ONLY
108 #define CONFIG_USB_GADGET_DUALSPEED
109 #define CONFIG_TWL4030_USB 1
110 #define CONFIG_USB_ETHER
111 #define CONFIG_USB_ETHER_RNDIS
112
113 /* USB EHCI */
114 #define CONFIG_CMD_USB
115 #define CONFIG_USB_EHCI
116
117 #define CONFIG_USB_EHCI_OMAP
118 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
119
120 #define CONFIG_USB_ULPI
121 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
122
123 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
124 #define CONFIG_USB_HOST_ETHER
125 #define CONFIG_USB_ETHER_SMSC95XX
126 #define CONFIG_USB_ETHER_ASIX
127
128
129 /* commands to include */
130 #include <config_cmd_default.h>
131
132 #define CONFIG_CMD_ASKENV
133
134 #define CONFIG_CMD_CACHE
135 #define CONFIG_CMD_EXT2 /* EXT2 Support */
136 #define CONFIG_CMD_FAT /* FAT support */
137 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
138 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
139 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
140 #define MTDIDS_DEFAULT "nand0=nand"
141 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
142 "1920k(u-boot),128k(u-boot-env),"\
143 "4m(kernel),-(fs)"
144
145 #define CONFIG_CMD_I2C /* I2C serial bus support */
146 #define CONFIG_CMD_MMC /* MMC support */
147 #define CONFIG_USB_STORAGE /* USB storage support */
148 #define CONFIG_CMD_NAND /* NAND support */
149 #define CONFIG_CMD_LED /* LED support */
150 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
151 #define CONFIG_CMD_NFS /* NFS support */
152 #define CONFIG_CMD_PING
153 #define CONFIG_CMD_DHCP
154 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */
155 #define CONFIG_CMD_GPIO /* Enable gpio command */
156
157 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
158 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
159 #undef CONFIG_CMD_IMI /* iminfo */
160 #undef CONFIG_CMD_IMLS /* List all found images */
161
162 #define CONFIG_SYS_NO_FLASH
163 #define CONFIG_HARD_I2C 1
164 #define CONFIG_SYS_I2C_SPEED 100000
165 #define CONFIG_SYS_I2C_SLAVE 1
166 #define CONFIG_I2C_MULTI_BUS 1
167 #define CONFIG_DRIVER_OMAP34XX_I2C 1
168 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
169
170 /*
171 * TWL4030
172 */
173 #define CONFIG_TWL4030_POWER 1
174 #define CONFIG_TWL4030_LED 1
175
176 /*
177 * Board NAND Info.
178 */
179 #define CONFIG_SYS_NAND_QUIET_TEST 1
180 #define CONFIG_NAND_OMAP_GPMC
181 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
182 /* to access nand */
183 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
184 /* to access nand at */
185 /* CS0 */
186 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
187
188 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
189 /* devices */
190 #define CONFIG_JFFS2_NAND
191 /* nand device jffs2 lives on */
192 #define CONFIG_JFFS2_DEV "nand0"
193 /* start of jffs2 partition */
194 #define CONFIG_JFFS2_PART_OFFSET 0x680000
195 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
196 /* partition */
197
198 /* Environment information */
199 #define CONFIG_BOOTDELAY 3
200
201 #define CONFIG_EXTRA_ENV_SETTINGS \
202 "loadaddr=0x80200000\0" \
203 "rdaddr=0x81000000\0" \
204 "usbtty=cdc_acm\0" \
205 "bootfile=uImage.beagle\0" \
206 "console=ttyO2,115200n8\0" \
207 "mpurate=auto\0" \
208 "buddy=none\0" \
209 "optargs=\0" \
210 "camera=none\0" \
211 "vram=12M\0" \
212 "dvimode=640x480MR-16@60\0" \
213 "defaultdisplay=dvi\0" \
214 "mmcdev=0\0" \
215 "mmcroot=/dev/mmcblk0p2 rw\0" \
216 "mmcrootfstype=ext3 rootwait\0" \
217 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
218 "nandrootfstype=ubifs\0" \
219 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
220 "ramrootfstype=ext2\0" \
221 "mmcargs=setenv bootargs console=${console} " \
222 "${optargs} " \
223 "mpurate=${mpurate} " \
224 "buddy=${buddy} "\
225 "camera=${camera} "\
226 "vram=${vram} " \
227 "omapfb.mode=dvi:${dvimode} " \
228 "omapdss.def_disp=${defaultdisplay} " \
229 "root=${mmcroot} " \
230 "rootfstype=${mmcrootfstype}\0" \
231 "nandargs=setenv bootargs console=${console} " \
232 "${optargs} " \
233 "mpurate=${mpurate} " \
234 "buddy=${buddy} "\
235 "camera=${camera} "\
236 "vram=${vram} " \
237 "omapfb.mode=dvi:${dvimode} " \
238 "omapdss.def_disp=${defaultdisplay} " \
239 "root=${nandroot} " \
240 "rootfstype=${nandrootfstype}\0" \
241 "bootenv=uEnv.txt\0" \
242 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
243 "importbootenv=echo Importing environment from mmc ...; " \
244 "env import -t $loadaddr $filesize\0" \
245 "ramargs=setenv bootargs console=${console} " \
246 "${optargs} " \
247 "mpurate=${mpurate} " \
248 "buddy=${buddy} "\
249 "vram=${vram} " \
250 "omapfb.mode=dvi:${dvimode} " \
251 "omapdss.def_disp=${defaultdisplay} " \
252 "root=${ramroot} " \
253 "rootfstype=${ramrootfstype}\0" \
254 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
255 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
256 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
257 "mmcboot=echo Booting from mmc ...; " \
258 "run mmcargs; " \
259 "bootm ${loadaddr}\0" \
260 "nandboot=echo Booting from nand ...; " \
261 "run nandargs; " \
262 "nand read ${loadaddr} 280000 400000; " \
263 "bootm ${loadaddr}\0" \
264 "ramboot=echo Booting from ramdisk ...; " \
265 "run ramargs; " \
266 "bootm ${loadaddr}\0" \
267 "userbutton=if gpio input 173; then run userbutton_xm; " \
268 "else run userbutton_nonxm; fi;\0" \
269 "userbutton_xm=gpio input 4;\0" \
270 "userbutton_nonxm=gpio input 7;\0"
271 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
272 #define CONFIG_BOOTCOMMAND \
273 "mmc dev ${mmcdev}; if mmc rescan; then " \
274 "if run userbutton; then " \
275 "setenv bootenv uEnv.txt;" \
276 "else " \
277 "setenv bootenv user.txt;" \
278 "fi;" \
279 "echo SD/MMC found on device ${mmcdev};" \
280 "if run loadbootenv; then " \
281 "echo Loaded environment from ${bootenv};" \
282 "run importbootenv;" \
283 "fi;" \
284 "if test -n $uenvcmd; then " \
285 "echo Running uenvcmd ...;" \
286 "run uenvcmd;" \
287 "fi;" \
288 "if run loaduimage; then " \
289 "run mmcboot;" \
290 "fi;" \
291 "fi;" \
292 "run nandboot;" \
293
294 #define CONFIG_AUTO_COMPLETE 1
295 /*
296 * Miscellaneous configurable options
297 */
298 #define CONFIG_SYS_LONGHELP /* undef to save memory */
299 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
300 #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # "
301 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
302 /* Print Buffer Size */
303 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
304 sizeof(CONFIG_SYS_PROMPT) + 16)
305 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
306 /* Boot Argument Buffer Size */
307 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
308
309 #define CONFIG_SYS_ALT_MEMTEST 1
310 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
311 /* defaults */
312 #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */
313 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
314
315 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
316 /* load address */
317
318 /*
319 * OMAP3 has 12 GP timers, they can be driven by the system clock
320 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
321 * This rate is divided by a local divisor.
322 */
323 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
324 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
325 #define CONFIG_SYS_HZ 1000
326
327 /*-----------------------------------------------------------------------
328 * Physical Memory Map
329 */
330 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
331 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
332 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
333
334 /*-----------------------------------------------------------------------
335 * FLASH and environment organization
336 */
337
338 /* **** PISMO SUPPORT *** */
339
340 /* Configure the PISMO */
341 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
342 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
343
344 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
345
346 #if defined(CONFIG_CMD_NAND)
347 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
348 #endif
349
350 /* Monitor at start of flash */
351 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
352 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
353
354 #define CONFIG_ENV_IS_IN_NAND 1
355 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
356 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
357
358 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
359 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
360 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
361
362 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
363 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
364 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
365 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
366 CONFIG_SYS_INIT_RAM_SIZE - \
367 GENERATED_GBL_DATA_SIZE)
368
369 #define CONFIG_OMAP3_SPI
370
371 #define CONFIG_SYS_CACHELINE_SIZE 64
372
373 /* Defines for SPL */
374 #define CONFIG_SPL
375 #define CONFIG_SPL_FRAMEWORK
376 #define CONFIG_SPL_NAND_SIMPLE
377 #define CONFIG_SPL_TEXT_BASE 0x40200800
378 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
379 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
380
381 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
382 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
383
384 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
385 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
386 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
387 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
388
389 #define CONFIG_SPL_BOARD_INIT
390 #define CONFIG_SPL_LIBCOMMON_SUPPORT
391 #define CONFIG_SPL_LIBDISK_SUPPORT
392 #define CONFIG_SPL_I2C_SUPPORT
393 #define CONFIG_SPL_LIBGENERIC_SUPPORT
394 #define CONFIG_SPL_MMC_SUPPORT
395 #define CONFIG_SPL_FAT_SUPPORT
396 #define CONFIG_SPL_SERIAL_SUPPORT
397 #define CONFIG_SPL_NAND_SUPPORT
398 #define CONFIG_SPL_NAND_BASE
399 #define CONFIG_SPL_NAND_DRIVERS
400 #define CONFIG_SPL_NAND_ECC
401 #define CONFIG_SPL_GPIO_SUPPORT
402 #define CONFIG_SPL_POWER_SUPPORT
403 #define CONFIG_SPL_OMAP3_ID_NAND
404 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
405
406 /* NAND boot config */
407 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
408 #define CONFIG_SYS_NAND_PAGE_COUNT 64
409 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
410 #define CONFIG_SYS_NAND_OOBSIZE 64
411 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
412 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
413 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
414 10, 11, 12, 13}
415 #define CONFIG_SYS_NAND_ECCSIZE 512
416 #define CONFIG_SYS_NAND_ECCBYTES 3
417 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
418 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
419
420 /*
421 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
422 * 64 bytes before this address should be set aside for u-boot.img's
423 * header. That is 0x800FFFC0--0x80100000 should not be used for any
424 * other needs.
425 */
426 #define CONFIG_SYS_TEXT_BASE 0x80100000
427 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
428 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
429
430 #endif /* __CONFIG_H */