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1 /*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * Configuration settings for the TI OMAP3530 Beagle board.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
16
17 /*
18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19 * 64 bytes before this address should be set aside for u-boot.img's
20 * header. That is 0x800FFFC0--0x80100000 should not be used for any
21 * other needs. We use this rather than the inherited defines from
22 * ti_armv7_common.h for backwards compatibility.
23 */
24 #define CONFIG_SYS_TEXT_BASE 0x80100000
25 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
26 #define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
29
30 #include <configs/ti_omap3_common.h>
31
32 #define CONFIG_MISC_INIT_R
33
34 #define CONFIG_REVISION_TAG 1
35 #define CONFIG_ENV_OVERWRITE
36
37 /* Status LED */
38
39 /* Enable Multi Bus support for I2C */
40 #define CONFIG_I2C_MULTI_BUS 1
41
42 /* Probe all devices */
43 #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
44
45 /* USB */
46 #define CONFIG_USB_MUSB_OMAP2PLUS
47 #define CONFIG_USB_MUSB_PIO_ONLY
48 #define CONFIG_TWL4030_USB 1
49 #define CONFIG_USB_ETHER
50 #define CONFIG_USB_ETHER_RNDIS
51
52 /* USB EHCI */
53
54 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
55
56 #define CONFIG_USB_HOST_ETHER
57 #define CONFIG_USB_ETHER_ASIX
58 #define CONFIG_USB_ETHER_MCS7830
59 #define CONFIG_USB_ETHER_SMSC95XX
60
61 /* commands to include */
62
63 #define MTDIDS_DEFAULT "nand0=nand"
64 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
65 "1920k(u-boot),128k(u-boot-env),"\
66 "4m(kernel),-(fs)"
67
68 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
69
70 /*
71 * TWL4030
72 */
73 #define CONFIG_TWL4030_LED 1
74
75 /*
76 * Board NAND Info.
77 */
78 #define CONFIG_NAND_OMAP_GPMC
79 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
80 /* devices */
81
82 #define BOOT_TARGET_DEVICES(func) \
83 func(MMC, mmc, 0)
84
85 #define CONFIG_BOOTCOMMAND \
86 "run findfdt; " \
87 "run distro_bootcmd; " \
88 "mmc dev ${mmcdev}; if mmc rescan; then " \
89 "if run userbutton; then " \
90 "setenv bootenv uEnv.txt;" \
91 "else " \
92 "setenv bootenv user.txt;" \
93 "fi;" \
94 "echo SD/MMC found on device ${mmcdev};" \
95 "if run loadbootenv; then " \
96 "echo Loaded environment from ${bootenv};" \
97 "run importbootenv;" \
98 "fi;" \
99 "if test -n $uenvcmd; then " \
100 "echo Running uenvcmd ...;" \
101 "run uenvcmd;" \
102 "fi;" \
103 "if run loadbootscript; then " \
104 "run bootscript; " \
105 "else " \
106 "if run loadimage; then " \
107 "run mmcboot;" \
108 "fi;" \
109 "fi; " \
110 "fi;" \
111 "run nandboot;" \
112 "setenv bootfile zImage;" \
113 "if run loadimage; then " \
114 "run loadfdt;" \
115 "run mmcbootz; " \
116 "fi; " \
117
118 #include <config_distro_bootcmd.h>
119
120 #define CONFIG_EXTRA_ENV_SETTINGS \
121 "loadaddr=0x80200000\0" \
122 "kernel_addr_r=0x80200000\0" \
123 "rdaddr=0x81000000\0" \
124 "initrd_addr_r=0x81000000\0" \
125 "fdt_high=0xffffffff\0" \
126 "fdtaddr=0x80f80000\0" \
127 "fdt_addr_r=0x80f80000\0" \
128 "usbtty=cdc_acm\0" \
129 "bootfile=uImage\0" \
130 "ramdisk=ramdisk.gz\0" \
131 "bootdir=/boot\0" \
132 "bootpart=0:2\0" \
133 "console=ttyO2,115200n8\0" \
134 "mpurate=auto\0" \
135 "buddy=none\0" \
136 "optargs=\0" \
137 "camera=none\0" \
138 "vram=12M\0" \
139 "dvimode=640x480MR-16@60\0" \
140 "defaultdisplay=dvi\0" \
141 "mmcdev=0\0" \
142 "mmcroot=/dev/mmcblk0p2 rw\0" \
143 "mmcrootfstype=ext3 rootwait\0" \
144 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
145 "nandrootfstype=ubifs\0" \
146 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
147 "ramrootfstype=ext2\0" \
148 "mmcargs=setenv bootargs console=${console} " \
149 "${optargs} " \
150 "mpurate=${mpurate} " \
151 "buddy=${buddy} "\
152 "camera=${camera} "\
153 "vram=${vram} " \
154 "omapfb.mode=dvi:${dvimode} " \
155 "omapdss.def_disp=${defaultdisplay} " \
156 "root=${mmcroot} " \
157 "rootfstype=${mmcrootfstype}\0" \
158 "nandargs=setenv bootargs console=${console} " \
159 "${optargs} " \
160 "mpurate=${mpurate} " \
161 "buddy=${buddy} "\
162 "camera=${camera} "\
163 "vram=${vram} " \
164 "omapfb.mode=dvi:${dvimode} " \
165 "omapdss.def_disp=${defaultdisplay} " \
166 "root=${nandroot} " \
167 "rootfstype=${nandrootfstype}\0" \
168 "findfdt=" \
169 "if test $beaglerev = AxBx; then " \
170 "setenv fdtfile omap3-beagle.dtb; fi; " \
171 "if test $beaglerev = Cx; then " \
172 "setenv fdtfile omap3-beagle.dtb; fi; " \
173 "if test $beaglerev = C4; then " \
174 "setenv fdtfile omap3-beagle.dtb; fi; " \
175 "if test $beaglerev = xMAB; then " \
176 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
177 "if test $beaglerev = xMC; then " \
178 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \
179 "if test $fdtfile = undefined; then " \
180 "echo WARNING: Could not determine device tree to use; fi; \0" \
181 "validatefdt=" \
182 "if test $beaglerev = xMAB; then " \
183 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
184 "setenv fdtfile omap3-beagle-xm.dtb; " \
185 "fi; " \
186 "fi; \0" \
187 "bootenv=uEnv.txt\0" \
188 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
189 "importbootenv=echo Importing environment from mmc ...; " \
190 "env import -t -r $loadaddr $filesize\0" \
191 "ramargs=setenv bootargs console=${console} " \
192 "${optargs} " \
193 "mpurate=${mpurate} " \
194 "buddy=${buddy} "\
195 "vram=${vram} " \
196 "omapfb.mode=dvi:${dvimode} " \
197 "omapdss.def_disp=${defaultdisplay} " \
198 "root=${ramroot} " \
199 "rootfstype=${ramrootfstype}\0" \
200 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
201 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
202 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
203 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
204 "source ${loadaddr}\0" \
205 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
206 "mmcboot=echo Booting from mmc ...; " \
207 "run mmcargs; " \
208 "bootm ${loadaddr}\0" \
209 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
210 "run mmcargs; " \
211 "bootz ${loadaddr} - ${fdtaddr}\0" \
212 "nandboot=echo Booting from nand ...; " \
213 "run nandargs; " \
214 "nand read ${loadaddr} 280000 400000; " \
215 "bootm ${loadaddr}\0" \
216 "ramboot=echo Booting from ramdisk ...; " \
217 "run ramargs; " \
218 "bootm ${loadaddr}\0" \
219 "userbutton=if gpio input 173; then run userbutton_xm; " \
220 "else run userbutton_nonxm; fi;\0" \
221 "userbutton_xm=gpio input 4;\0" \
222 "userbutton_nonxm=gpio input 7;\0" \
223 BOOTENV
224
225 /*
226 * OMAP3 has 12 GP timers, they can be driven by the system clock
227 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
228 * This rate is divided by a local divisor.
229 */
230 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
231
232 /*-----------------------------------------------------------------------
233 * FLASH and environment organization
234 */
235
236 /* **** PISMO SUPPORT *** */
237 #if defined(CONFIG_CMD_NAND)
238 #define CONFIG_SYS_FLASH_BASE NAND_BASE
239 #endif
240
241 /* Monitor at start of flash */
242 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
243 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
244
245 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
246 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
247 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
248
249 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
250 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
251 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
252
253 /* Defines for SPL */
254 #define CONFIG_SPL_OMAP3_ID_NAND
255
256 /* NAND boot config */
257 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
258 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
259 #define CONFIG_SYS_NAND_PAGE_COUNT 64
260 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
261 #define CONFIG_SYS_NAND_OOBSIZE 64
262 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
263 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
264 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
265 10, 11, 12, 13}
266 #define CONFIG_SYS_NAND_ECCSIZE 512
267 #define CONFIG_SYS_NAND_ECCBYTES 3
268 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
269 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
270 /* NAND: SPL falcon mode configs */
271 #ifdef CONFIG_SPL_OS_BOOT
272 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
273 #endif
274
275 #endif /* __CONFIG_H */