include/configs/omap3_evm.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Author :
   5  *      Manikandan Pillai <mani.pillai@ti.com>
   6  * Derived from Beagle Board and 3430 SDP code by
   7  *      Richard Woodruff <r-woodruff2@ti.com>
   8  *      Syed Mohammed Khasim <khasim@ti.com>
   9  *
  10  * Manikandan Pillai <mani.pillai@ti.com>
  11  *
  12  * Configuration settings for the TI OMAP3 EVM board.
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #ifndef __CONFIG_H
  34 #define __CONFIG_H
  35
  36 /*
  37  * High Level Configuration Options
  38  */
  39 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  40 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  41 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  42 #define CONFIG_OMAP3_EVM        1       /* working with EVM */
  43
  44 #define CONFIG_SDRC     /* The chip has SDRC controller */
  45
  46 #include <asm/arch/cpu.h>       /* get chip and board defs */
  47 #include <asm/arch/omap3.h>
  48
  49 /*
  50  * Display CPU and Board information
  51  */
  52 #define CONFIG_DISPLAY_CPUINFO          1
  53 #define CONFIG_DISPLAY_BOARDINFO        1
  54
  55 /* Clock Defines */
  56 #define V_OSCK                  26000000        /* Clock output from T2 */
  57 #define V_SCLK                  (V_OSCK >> 1)
  58
  59 #undef CONFIG_USE_IRQ                   /* no support for IRQs */
  60 #define CONFIG_MISC_INIT_R
  61
  62 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  63 #define CONFIG_SETUP_MEMORY_TAGS        1
  64 #define CONFIG_INITRD_TAG               1
  65 #define CONFIG_REVISION_TAG             1
  66
  67 /*
  68  * Size of malloc() pool
  69  */
  70 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  71                                                 /* Sector */
  72 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  73 /*
  74  * Hardware drivers
  75  */
  76
  77 /*
  78  * NS16550 Configuration
  79  */
  80 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  81
  82 #define CONFIG_SYS_NS16550
  83 #define CONFIG_SYS_NS16550_SERIAL
  84 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  85 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  86
  87 /*
  88  * select serial console configuration
  89  */
  90 #define CONFIG_CONS_INDEX               1
  91 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  92 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
  93
  94 /* allow to overwrite serial and ethaddr */
  95 #define CONFIG_ENV_OVERWRITE
  96 #define CONFIG_BAUDRATE                 115200
  97 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  98                                         115200}
  99 #define CONFIG_MMC                      1
 100 #define CONFIG_OMAP3_MMC                1
 101 #define CONFIG_DOS_PARTITION            1
 102
 103 /* DDR - I use Micron DDR */
 104 #define CONFIG_OMAP3_MICRON_DDR         1
 105
 106 /* USB
 107  * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
 108  * Enable CONFIG_MUSB_UDD for Device functionalities.
 109  */
 110 #define CONFIG_USB_OMAP3                1
 111 #define CONFIG_MUSB_HCD                 1
 112 /* #define CONFIG_MUSB_UDC              1 */
 113
 114 #ifdef CONFIG_USB_OMAP3
 115
 116 #ifdef CONFIG_MUSB_HCD
 117 #define CONFIG_CMD_USB
 118
 119 #define CONFIG_USB_STORAGE
 120 #define CONGIG_CMD_STORAGE
 121 #define CONFIG_CMD_FAT
 122
 123 #ifdef CONFIG_USB_KEYBOARD
 124 #define CONFIG_SYS_USB_EVENT_POLL
 125 #define CONFIG_PREBOOT "usb start"
 126 #endif /* CONFIG_USB_KEYBOARD */
 127
 128 #endif /* CONFIG_MUSB_HCD */
 129
 130 #ifdef CONFIG_MUSB_UDC
 131 /* USB device configuration */
 132 #define CONFIG_USB_DEVICE               1
 133 #define CONFIG_USB_TTY                  1
 134 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 135 /* Change these to suit your needs */
 136 #define CONFIG_USBD_VENDORID            0x0451
 137 #define CONFIG_USBD_PRODUCTID           0x5678
 138 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 139 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 140 #endif /* CONFIG_MUSB_UDC */
 141
 142 #endif /* CONFIG_USB_OMAP3 */
 143
 144 /* commands to include */
 145 #include <config_cmd_default.h>
 146
 147 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 148 #define CONFIG_CMD_FAT          /* FAT support                  */
 149 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 150
 151 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 152 #define CONFIG_CMD_MMC          /* MMC support                  */
 153 #define CONFIG_CMD_NAND         /* NAND support                 */
 154 #define CONFIG_CMD_DHCP
 155 #define CONFIG_CMD_PING
 156
 157 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 158 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 159 #undef CONFIG_CMD_IMI           /* iminfo                       */
 160 #undef CONFIG_CMD_IMLS          /* List all found images        */
 161
 162 #define CONFIG_SYS_NO_FLASH
 163 #define CONFIG_HARD_I2C                 1
 164 #define CONFIG_SYS_I2C_SPEED            100000
 165 #define CONFIG_SYS_I2C_SLAVE            1
 166 #define CONFIG_SYS_I2C_BUS              0
 167 #define CONFIG_SYS_I2C_BUS_SELECT       1
 168 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 169
 170 /*
 171  * TWL4030
 172  */
 173 #define CONFIG_TWL4030_POWER            1
 174
 175 /*
 176  * Board NAND Info.
 177  */
 178 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 179                                                         /* to access nand */
 180 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 181                                                         /* to access */
 182                                                         /* nand at CS0 */
 183
 184 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 185                                                         /* NAND devices */
 186 #define CONFIG_JFFS2_NAND
 187 /* nand device jffs2 lives on */
 188 #define CONFIG_JFFS2_DEV                "nand0"
 189 /* start of jffs2 partition */
 190 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 191 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
 192
 193 /* Environment information */
 194 #define CONFIG_BOOTDELAY        10
 195
 196 #define CONFIG_BOOTFILE         uImage
 197
 198 #define CONFIG_EXTRA_ENV_SETTINGS \
 199         "loadaddr=0x82000000\0" \
 200         "usbtty=cdc_acm\0" \
 201         "console=ttyS2,115200n8\0" \
 202         "mmcargs=setenv bootargs console=${console} " \
 203                 "root=/dev/mmcblk0p2 rw " \
 204                 "rootfstype=ext3 rootwait\0" \
 205         "nandargs=setenv bootargs console=${console} " \
 206                 "root=/dev/mtdblock4 rw " \
 207                 "rootfstype=jffs2\0" \
 208         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
 209         "bootscript=echo Running bootscript from mmc ...; " \
 210                 "source ${loadaddr}\0" \
 211         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
 212         "mmcboot=echo Booting from mmc ...; " \
 213                 "run mmcargs; " \
 214                 "bootm ${loadaddr}\0" \
 215         "nandboot=echo Booting from nand ...; " \
 216                 "run nandargs; " \
 217                 "onenand read ${loadaddr} 280000 400000; " \
 218                 "bootm ${loadaddr}\0" \
 219
 220 #define CONFIG_BOOTCOMMAND \
 221         "if mmc init; then " \
 222                 "if run loadbootscript; then " \
 223                         "run bootscript; " \
 224                 "else " \
 225                         "if run loaduimage; then " \
 226                                 "run mmcboot; " \
 227                         "else run nandboot; " \
 228                         "fi; " \
 229                 "fi; " \
 230         "else run nandboot; fi"
 231
 232 #define CONFIG_AUTO_COMPLETE    1
 233 /*
 234  * Miscellaneous configurable options
 235  */
 236 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 237 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 238 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 239 #define CONFIG_SYS_PROMPT               "OMAP3_EVM # "
 240 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 241 /* Print Buffer Size */
 242 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 243                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 244 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
 245                                                 /* args */
 246 /* Boot Argument Buffer Size */
 247 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 248 /* memtest works on */
 249 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 250 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 251                                         0x01F00000) /* 31MB */
 252
 253 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 254                                                                 /* address */
 255
 256 /*
 257  * OMAP3 has 12 GP timers, they can be driven by the system clock
 258  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 259  * This rate is divided by a local divisor.
 260  */
 261 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 262 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 263 #define CONFIG_SYS_HZ                   1000
 264
 265 /*-----------------------------------------------------------------------
 266  * Stack sizes
 267  *
 268  * The stack sizes are set up in start.S using the settings below
 269  */
 270 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 271 #ifdef CONFIG_USE_IRQ
 272 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 273 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 274 #endif
 275
 276 /*-----------------------------------------------------------------------
 277  * Physical Memory Map
 278  */
 279 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 280 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 281 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 282 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 283
 284 /* SDRAM Bank Allocation method */
 285 #define SDRC_R_B_C              1
 286
 287 /*-----------------------------------------------------------------------
 288  * FLASH and environment organization
 289  */
 290
 291 /* **** PISMO SUPPORT *** */
 292
 293 /* Configure the PISMO */
 294 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 295 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 296
 297 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 298
 299 #if defined(CONFIG_CMD_NAND)
 300 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 301 #elif defined(CONFIG_CMD_ONENAND)
 302 #define CONFIG_SYS_FLASH_BASE           PISMO1_ONEN_BASE
 303 #endif
 304
 305 /* Monitor at start of flash */
 306 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 307 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 308
 309 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 310 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 311
 312 #if defined(CONFIG_CMD_NAND)
 313 #define CONFIG_NAND_OMAP_GPMC
 314 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 315 #define CONFIG_ENV_IS_IN_NAND
 316 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 317 #elif defined(CONFIG_CMD_ONENAND)
 318 #define CONFIG_ENV_IS_IN_ONENAND        1
 319 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 320 #endif
 321
 322 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 323 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 324
 325 /*
 326  * Support for relocation
 327  */
 328 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 329 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 330 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 331 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 332                                          CONFIG_SYS_INIT_RAM_SIZE - \
 333                                          GENERATED_GBL_DATA_SIZE)
 334
 335 /*
 336  * Define the board revision statically
 337  */
 338 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 339
 340 /*----------------------------------------------------------------------------
 341  * SMSC9115 Ethernet from SMSC9118 family
 342  *----------------------------------------------------------------------------
 343  */
 344 #if defined(CONFIG_CMD_NET)
 345
 346 #define CONFIG_NET_MULTI
 347 #define CONFIG_SMC911X
 348 #define CONFIG_SMC911X_32_BIT
 349 #define CONFIG_SMC911X_BASE     0x2C000000
 350
 351 #endif /* (CONFIG_CMD_NET) */
 352
 353 /*
 354  * BOOTP fields
 355  */
 356
 357 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 358 #define CONFIG_BOOTP_GATEWAY            0x00000002
 359 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 360 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 361
 362 #endif /* __CONFIG_H */