include/configs/omap3_evm_common.h

   1 /*
   2  * Common configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12  * kind, whether express or implied; without even the implied warranty
  13  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef __OMAP3_EVM_COMMON_H
  18 #define __OMAP3_EVM_COMMON_H
  19
  20 /*
  21  * High level configuration options
  22  */
  23 #define CONFIG_OMAP                     /* This is TI OMAP core */
  24 #define CONFIG_OMAP34XX                 /* belonging to 34XX family */
  25 #define CONFIG_OMAP_GPIO
  26
  27 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  28
  29 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
  30 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
  31
  32 /*
  33  * Clock related definitions
  34  */
  35 #define V_OSCK                  26000000        /* Clock output from T2 */
  36 #define V_SCLK                  (V_OSCK >> 1)
  37
  38 /*
  39  * OMAP3 has 12 GP timers, they can be driven by the system clock
  40  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  41  * This rate is divided by a local divisor.
  42  */
  43 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  44 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  45 #define CONFIG_SYS_HZ                   1000
  46
  47 /* Size of environment - 128KB */
  48 #define CONFIG_ENV_SIZE                 (128 << 10)
  49
  50 /* Size of malloc pool */
  51 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  52
  53 /*
  54  * Physical Memory Map
  55  * Note 1: CS1 may or may not be populated
  56  * Note 2: SDRAM size is expected to be at least 32MB
  57  */
  58 #define CONFIG_NR_DRAM_BANKS            2
  59 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
  60 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
  61
  62 /* Limits for memtest */
  63 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  64 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  65                                                 0x01F00000) /* 31MB */
  66
  67 /* Default load address */
  68 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
  69
  70 /* -----------------------------------------------------------------------------
  71  * Hardware drivers
  72  * -----------------------------------------------------------------------------
  73  */
  74
  75 /*
  76  * NS16550 Configuration
  77  */
  78 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  79
  80 #define CONFIG_SYS_NS16550
  81 #define CONFIG_SYS_NS16550_SERIAL
  82 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  83 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  84
  85 /*
  86  * select serial console configuration
  87  */
  88 #define CONFIG_CONS_INDEX               1
  89 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
  90 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  91 #define CONFIG_BAUDRATE                 115200
  92 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  93                                         115200}
  94
  95 /*
  96  * I2C
  97  */
  98 #define CONFIG_HARD_I2C
  99 #define CONFIG_DRIVER_OMAP34XX_I2C
 100
 101 #define CONFIG_SYS_I2C_SPEED            100000
 102 #define CONFIG_SYS_I2C_SLAVE            1
 103 #define CONFIG_SYS_I2C_BUS              0
 104 #define CONFIG_SYS_I2C_BUS_SELECT       1
 105
 106 /*
 107  * PISMO support
 108  */
 109 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 110 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 111
 112 /* Monitor at start of flash - Reserve 2 sectors */
 113 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 114
 115 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 116
 117 /* Start location & size of environment */
 118 #define ONENAND_ENV_OFFSET              0x260000
 119 #define SMNAND_ENV_OFFSET               0x260000
 120
 121 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 122
 123 /*
 124  * NAND
 125  */
 126 /* Physical address to access NAND */
 127 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 128
 129 /* Physical address to access NAND at CS0 */
 130 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 131
 132 /* Max number of NAND devices */
 133 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 134
 135 /* Timeout values (in ticks) */
 136 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 137 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 138
 139 /* Flash banks JFFS2 should use */
 140 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 141                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 142
 143 #define CONFIG_SYS_JFFS2_MEM_NAND
 144 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 145 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 146
 147 #define CONFIG_JFFS2_NAND
 148 /* nand device jffs2 lives on */
 149 #define CONFIG_JFFS2_DEV                "nand0"
 150 /* Start of jffs2 partition */
 151 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 152 /* Size of jffs2 partition */
 153 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 154
 155 /*
 156  * USB
 157  */
 158 #ifdef CONFIG_USB_OMAP3
 159
 160 #ifdef CONFIG_MUSB_HCD
 161 #define CONFIG_CMD_USB
 162
 163 #define CONFIG_USB_STORAGE
 164 #define CONGIG_CMD_STORAGE
 165 #define CONFIG_CMD_FAT
 166
 167 #ifdef CONFIG_USB_KEYBOARD
 168 #define CONFIG_SYS_USB_EVENT_POLL
 169 #define CONFIG_PREBOOT                  "usb start"
 170 #endif /* CONFIG_USB_KEYBOARD */
 171
 172 #endif /* CONFIG_MUSB_HCD */
 173
 174 #ifdef CONFIG_MUSB_UDC
 175 /* USB device configuration */
 176 #define CONFIG_USB_DEVICE
 177 #define CONFIG_USB_TTY
 178 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 179
 180 /* Change these to suit your needs */
 181 #define CONFIG_USBD_VENDORID            0x0451
 182 #define CONFIG_USBD_PRODUCTID           0x5678
 183 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 184 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 185 #endif /* CONFIG_MUSB_UDC */
 186
 187 #endif /* CONFIG_USB_OMAP3 */
 188
 189 /* ----------------------------------------------------------------------------
 190  * U-boot features
 191  * ----------------------------------------------------------------------------
 192  */
 193 #define CONFIG_SYS_PROMPT               "OMAP3_EVM # "
 194 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 195
 196 #define CONFIG_MISC_INIT_R
 197
 198 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 199 #define CONFIG_SETUP_MEMORY_TAGS
 200 #define CONFIG_INITRD_TAG
 201 #define CONFIG_REVISION_TAG
 202
 203 /* Size of Console IO buffer */
 204 #define CONFIG_SYS_CBSIZE               512
 205
 206 /* Size of print buffer */
 207 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 208                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 209
 210 /* Size of bootarg buffer */
 211 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 212
 213 #define CONFIG_BOOTFILE                 "uImage"
 214
 215 /*
 216  * NAND / OneNAND
 217  */
 218 #if defined(CONFIG_CMD_NAND)
 219 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 220
 221 #define CONFIG_NAND_OMAP_GPMC
 222 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 223 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 224 #elif defined(CONFIG_CMD_ONENAND)
 225 #define CONFIG_SYS_FLASH_BASE           PISMO1_ONEN_BASE
 226 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 227 #endif
 228
 229 #if !defined(CONFIG_ENV_IS_NOWHERE)
 230 #if defined(CONFIG_CMD_NAND)
 231 #define CONFIG_ENV_IS_IN_NAND
 232 #elif defined(CONFIG_CMD_ONENAND)
 233 #define CONFIG_ENV_IS_IN_ONENAND
 234 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 235 #endif
 236 #endif /* CONFIG_ENV_IS_NOWHERE */
 237
 238 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 239
 240 #if defined(CONFIG_CMD_NET)
 241
 242 /* Ethernet (SMSC9115 from SMSC9118 family) */
 243 #define CONFIG_SMC911X
 244 #define CONFIG_SMC911X_32_BIT
 245 #define CONFIG_SMC911X_BASE             0x2C000000
 246
 247 /* BOOTP fields */
 248 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 249 #define CONFIG_BOOTP_GATEWAY            0x00000002
 250 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 251 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 252
 253 #endif /* CONFIG_CMD_NET */
 254
 255 /* Support for relocation */
 256 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 257 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 258 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 259 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 260                                          CONFIG_SYS_INIT_RAM_SIZE - \
 261                                          GENERATED_GBL_DATA_SIZE)
 262
 263 /* -----------------------------------------------------------------------------
 264  * Board specific
 265  * -----------------------------------------------------------------------------
 266  */
 267 #define CONFIG_SYS_NO_FLASH
 268
 269 /* Uncomment to define the board revision statically */
 270 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 271
 272 #define CONFIG_SYS_CACHELINE_SIZE       64
 273
 274 /* Defines for SPL */
 275 #define CONFIG_SPL
 276 #define CONFIG_SPL_FRAMEWORK
 277 #define CONFIG_SPL_TEXT_BASE            0x40200800
 278 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 279 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 280
 281 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 282 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 283
 284 #define CONFIG_SPL_BOARD_INIT
 285 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 286 #define CONFIG_SPL_LIBDISK_SUPPORT
 287 #define CONFIG_SPL_I2C_SUPPORT
 288 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 289 #define CONFIG_SPL_SERIAL_SUPPORT
 290 #define CONFIG_SPL_POWER_SUPPORT
 291 #define CONFIG_SPL_OMAP3_ID_NAND
 292 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 293
 294 /*
 295  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 296  * 64 bytes before this address should be set aside for u-boot.img's
 297  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 298  * other needs.
 299  */
 300 #define CONFIG_SYS_TEXT_BASE            0x80100000
 301 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 302 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 303
 304 #endif /* __OMAP3_EVM_COMMON_H */