include/configs/omap3_evm_common.h

   1 /*
   2  * Common configuration settings for the TI OMAP3 EVM board.
   3  *
   4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __OMAP3_EVM_COMMON_H
  10 #define __OMAP3_EVM_COMMON_H
  11
  12 /*
  13  * High level configuration options
  14  */
  15 #define CONFIG_OMAP                     /* This is TI OMAP core */
  16 #define CONFIG_OMAP34XX                 /* belonging to 34XX family */
  17 #define CONFIG_OMAP_GPIO
  18
  19 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  20
  21 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
  22 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
  23
  24 /*
  25  * Clock related definitions
  26  */
  27 #define V_OSCK                  26000000        /* Clock output from T2 */
  28 #define V_SCLK                  (V_OSCK >> 1)
  29
  30 /*
  31  * OMAP3 has 12 GP timers, they can be driven by the system clock
  32  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  33  * This rate is divided by a local divisor.
  34  */
  35 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  36 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  37 #define CONFIG_SYS_HZ                   1000
  38
  39 /* Size of environment - 128KB */
  40 #define CONFIG_ENV_SIZE                 (128 << 10)
  41
  42 /* Size of malloc pool */
  43 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  44
  45 /*
  46  * Physical Memory Map
  47  * Note 1: CS1 may or may not be populated
  48  * Note 2: SDRAM size is expected to be at least 32MB
  49  */
  50 #define CONFIG_NR_DRAM_BANKS            2
  51 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
  52 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
  53
  54 /* Limits for memtest */
  55 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  56 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  57                                                 0x01F00000) /* 31MB */
  58
  59 /* Default load address */
  60 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
  61
  62 /* -----------------------------------------------------------------------------
  63  * Hardware drivers
  64  * -----------------------------------------------------------------------------
  65  */
  66
  67 /*
  68  * NS16550 Configuration
  69  */
  70 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  71
  72 #define CONFIG_SYS_NS16550
  73 #define CONFIG_SYS_NS16550_SERIAL
  74 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  75 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  76
  77 /*
  78  * select serial console configuration
  79  */
  80 #define CONFIG_CONS_INDEX               1
  81 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
  82 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  83 #define CONFIG_BAUDRATE                 115200
  84 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  85                                         115200}
  86
  87 /*
  88  * I2C
  89  */
  90 #define CONFIG_HARD_I2C
  91 #define CONFIG_DRIVER_OMAP34XX_I2C
  92
  93 #define CONFIG_SYS_I2C_SPEED            100000
  94 #define CONFIG_SYS_I2C_SLAVE            1
  95
  96 /*
  97  * PISMO support
  98  */
  99 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 100 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 101
 102 /* Monitor at start of flash - Reserve 2 sectors */
 103 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 104
 105 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 106
 107 /* Start location & size of environment */
 108 #define ONENAND_ENV_OFFSET              0x260000
 109 #define SMNAND_ENV_OFFSET               0x260000
 110
 111 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 112
 113 /*
 114  * NAND
 115  */
 116 /* Physical address to access NAND */
 117 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
 118
 119 /* Physical address to access NAND at CS0 */
 120 #define CONFIG_SYS_NAND_BASE            NAND_BASE
 121
 122 /* Max number of NAND devices */
 123 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 124
 125 /* Timeout values (in ticks) */
 126 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 127 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 128
 129 /* Flash banks JFFS2 should use */
 130 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 131                                                 CONFIG_SYS_MAX_NAND_DEVICE)
 132
 133 #define CONFIG_SYS_JFFS2_MEM_NAND
 134 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 135 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 136
 137 #define CONFIG_JFFS2_NAND
 138 /* nand device jffs2 lives on */
 139 #define CONFIG_JFFS2_DEV                "nand0"
 140 /* Start of jffs2 partition */
 141 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 142 /* Size of jffs2 partition */
 143 #define CONFIG_JFFS2_PART_SIZE          0xf980000
 144
 145 /*
 146  * USB
 147  */
 148 #ifdef CONFIG_USB_OMAP3
 149
 150 #ifdef CONFIG_MUSB_HCD
 151 #define CONFIG_CMD_USB
 152
 153 #define CONFIG_USB_STORAGE
 154 #define CONGIG_CMD_STORAGE
 155 #define CONFIG_CMD_FAT
 156
 157 #ifdef CONFIG_USB_KEYBOARD
 158 #define CONFIG_SYS_USB_EVENT_POLL
 159 #define CONFIG_PREBOOT                  "usb start"
 160 #endif /* CONFIG_USB_KEYBOARD */
 161
 162 #endif /* CONFIG_MUSB_HCD */
 163
 164 #ifdef CONFIG_MUSB_UDC
 165 /* USB device configuration */
 166 #define CONFIG_USB_DEVICE
 167 #define CONFIG_USB_TTY
 168 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 169
 170 /* Change these to suit your needs */
 171 #define CONFIG_USBD_VENDORID            0x0451
 172 #define CONFIG_USBD_PRODUCTID           0x5678
 173 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 174 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
 175 #endif /* CONFIG_MUSB_UDC */
 176
 177 #endif /* CONFIG_USB_OMAP3 */
 178
 179 /* ----------------------------------------------------------------------------
 180  * U-boot features
 181  * ----------------------------------------------------------------------------
 182  */
 183 #define CONFIG_SYS_PROMPT               "OMAP3_EVM # "
 184 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
 185
 186 #define CONFIG_MISC_INIT_R
 187
 188 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
 189 #define CONFIG_SETUP_MEMORY_TAGS
 190 #define CONFIG_INITRD_TAG
 191 #define CONFIG_REVISION_TAG
 192
 193 /* Size of Console IO buffer */
 194 #define CONFIG_SYS_CBSIZE               512
 195
 196 /* Size of print buffer */
 197 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 198                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 199
 200 /* Size of bootarg buffer */
 201 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 202
 203 #define CONFIG_BOOTFILE                 "uImage"
 204
 205 /*
 206  * NAND / OneNAND
 207  */
 208 #if defined(CONFIG_CMD_NAND)
 209 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 210
 211 #define CONFIG_NAND_OMAP_GPMC
 212 #define GPMC_NAND_ECC_LP_x16_LAYOUT
 213 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 214 #elif defined(CONFIG_CMD_ONENAND)
 215 #define CONFIG_SYS_FLASH_BASE           PISMO1_ONEN_BASE
 216 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 217 #endif
 218
 219 #if !defined(CONFIG_ENV_IS_NOWHERE)
 220 #if defined(CONFIG_CMD_NAND)
 221 #define CONFIG_ENV_IS_IN_NAND
 222 #elif defined(CONFIG_CMD_ONENAND)
 223 #define CONFIG_ENV_IS_IN_ONENAND
 224 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
 225 #endif
 226 #endif /* CONFIG_ENV_IS_NOWHERE */
 227
 228 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
 229
 230 #if defined(CONFIG_CMD_NET)
 231
 232 /* Ethernet (SMSC9115 from SMSC9118 family) */
 233 #define CONFIG_SMC911X
 234 #define CONFIG_SMC911X_32_BIT
 235 #define CONFIG_SMC911X_BASE             0x2C000000
 236
 237 /* BOOTP fields */
 238 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
 239 #define CONFIG_BOOTP_GATEWAY            0x00000002
 240 #define CONFIG_BOOTP_HOSTNAME           0x00000004
 241 #define CONFIG_BOOTP_BOOTPATH           0x00000010
 242
 243 #endif /* CONFIG_CMD_NET */
 244
 245 /* Support for relocation */
 246 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 247 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 248 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 249 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 250                                          CONFIG_SYS_INIT_RAM_SIZE - \
 251                                          GENERATED_GBL_DATA_SIZE)
 252
 253 /* -----------------------------------------------------------------------------
 254  * Board specific
 255  * -----------------------------------------------------------------------------
 256  */
 257 #define CONFIG_SYS_NO_FLASH
 258
 259 /* Uncomment to define the board revision statically */
 260 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
 261
 262 #define CONFIG_SYS_CACHELINE_SIZE       64
 263
 264 /* Defines for SPL */
 265 #define CONFIG_SPL
 266 #define CONFIG_SPL_FRAMEWORK
 267 #define CONFIG_SPL_TEXT_BASE            0x40200800
 268 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 269 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 270
 271 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
 272 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 273
 274 #define CONFIG_SPL_BOARD_INIT
 275 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 276 #define CONFIG_SPL_LIBDISK_SUPPORT
 277 #define CONFIG_SPL_I2C_SUPPORT
 278 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 279 #define CONFIG_SPL_SERIAL_SUPPORT
 280 #define CONFIG_SPL_POWER_SUPPORT
 281 #define CONFIG_SPL_OMAP3_ID_NAND
 282 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 283
 284 /*
 285  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 286  * 64 bytes before this address should be set aside for u-boot.img's
 287  * header. That is 0x800FFFC0--0x80100000 should not be used for any
 288  * other needs.
 289  */
 290 #define CONFIG_SYS_TEXT_BASE            0x80100000
 291 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 292 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
 293
 294 #endif /* __OMAP3_EVM_COMMON_H */