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1 /*
2 * Common configuration settings for IGEP technology based boards
3 *
4 * (C) Copyright 2012
5 * ISEE 2007 SL, <www.iseebcn.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H
12
13 #ifdef CONFIG_BOOT_NAND
14 #define CONFIG_NAND
15 #endif
16
17 #define CONFIG_NR_DRAM_BANKS 2
18
19 #include <configs/ti_omap3_common.h>
20 #include <asm/mach-types.h>
21
22 #undef CONFIG_BOOTDELAY
23
24 /*
25 * Display CPU and Board information
26 */
27 #define CONFIG_DISPLAY_CPUINFO 1
28 #define CONFIG_DISPLAY_BOARDINFO 1
29
30 #define CONFIG_MISC_INIT_R
31
32 #define CONFIG_REVISION_TAG 1
33
34 /* Status LED available for IGEP0020 and IGEP0030 but not IGEP0032 */
35 #if (CONFIG_MACH_TYPE != MACH_TYPE_IGEP0032)
36 #define CONFIG_STATUS_LED
37 #define CONFIG_BOARD_SPECIFIC_LED
38 #define CONFIG_GPIO_LED
39 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020)
40 #define RED_LED_GPIO 27
41 #elif (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
42 #define RED_LED_GPIO 16
43 #else
44 #error "status LED not defined for this machine."
45 #endif
46 #define RED_LED_DEV 0
47 #define STATUS_LED_BIT RED_LED_GPIO
48 #define STATUS_LED_STATE STATUS_LED_ON
49 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
50 #define STATUS_LED_BOOT RED_LED_DEV
51 #endif
52
53 /* GPIO banks */
54 #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */
55 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
56 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
57
58 /* USB */
59 #define CONFIG_USB_MUSB_UDC 1
60 #define CONFIG_USB_OMAP3 1
61 #define CONFIG_TWL4030_USB 1
62
63 /* USB device configuration */
64 #define CONFIG_USB_DEVICE 1
65 #define CONFIG_USB_TTY 1
66 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
67
68 /* Change these to suit your needs */
69 #define CONFIG_USBD_VENDORID 0x0451
70 #define CONFIG_USBD_PRODUCTID 0x5678
71 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
72 #define CONFIG_USBD_PRODUCT_NAME "IGEP"
73
74 #define CONFIG_CMD_CACHE
75 #ifdef CONFIG_BOOT_ONENAND
76 #define CONFIG_CMD_ONENAND /* ONENAND support */
77 #endif
78 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
79 (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
80 #endif
81 #define CONFIG_CMD_DHCP
82 #define CONFIG_CMD_PING
83
84 /*#undef CONFIG_ENV_IS_NOWHERE*/
85
86 #ifndef CONFIG_SPL_BUILD
87
88 /* Environment */
89 #define ENV_DEVICE_SETTINGS \
90 "stdin=serial\0" \
91 "stdout=serial\0" \
92 "stderr=serial\0"
93
94 #define MEM_LAYOUT_SETTINGS \
95 DEFAULT_LINUX_BOOT_ENV \
96 "scriptaddr=0x87E00000\0" \
97 "pxefile_addr_r=0x87F00000\0"
98
99 #define BOOT_TARGET_DEVICES(func) \
100 func(MMC, mmc, 0)
101
102 #include <config_distro_bootcmd.h>
103
104
105 #define CONFIG_EXTRA_ENV_SETTINGS \
106 ENV_DEVICE_SETTINGS \
107 MEM_LAYOUT_SETTINGS \
108 BOOTENV
109
110 #endif
111
112 /*
113 * FLASH and environment organization
114 */
115
116 #ifdef CONFIG_BOOT_ONENAND
117 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
118
119 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
120
121 #define CONFIG_ENV_IS_IN_ONENAND 1
122 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
123 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
124 #endif
125
126 #ifdef CONFIG_NAND
127 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
128 #define CONFIG_ENV_IS_IN_NAND 1
129 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
130 #define CONFIG_ENV_ADDR NAND_ENV_OFFSET
131 #endif
132
133 /*
134 * SMSC911x Ethernet
135 */
136 #if defined(CONFIG_CMD_NET)
137 #define CONFIG_SMC911X
138 #define CONFIG_SMC911X_32_BIT
139 #define CONFIG_SMC911X_BASE 0x2C000000
140 #endif /* (CONFIG_CMD_NET) */
141
142 /* OneNAND boot config */
143 #ifdef CONFIG_BOOT_ONENAND
144 #define CONFIG_SPL_ONENAND_SUPPORT
145 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
146 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
147 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
148 #define CONFIG_SPL_ONENAND_LOAD_SIZE \
149 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
150
151 #endif
152
153 /* NAND boot config */
154 #ifdef CONFIG_NAND
155 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
157 #define CONFIG_SYS_NAND_PAGE_COUNT 64
158 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
159 #define CONFIG_SYS_NAND_OOBSIZE 64
160 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
161 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
162 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
163 10, 11, 12, 13, 14, 15, 16, 17, \
164 18, 19, 20, 21, 22, 23, 24, 25, \
165 26, 27, 28, 29, 30, 31, 32, 33, \
166 34, 35, 36, 37, 38, 39, 40, 41, \
167 42, 43, 44, 45, 46, 47, 48, 49, \
168 50, 51, 52, 53, 54, 55, 56, 57, }
169 #define CONFIG_SYS_NAND_ECCSIZE 512
170 #define CONFIG_SYS_NAND_ECCBYTES 14
171 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
172 #define CONFIG_NAND_OMAP_GPMC
173 #define CONFIG_BCH
174
175 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
176 /* NAND: SPL falcon mode configs */
177 #ifdef CONFIG_SPL_OS_BOOT
178 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
179 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
180 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
181 #endif
182 #endif
183
184 #endif /* __IGEP00X0_H */