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1 /*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /* High Level Configuration Options */
15
16 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
17
18 #include <configs/ti_omap3_common.h>
19
20 /*
21 * We are only ever GP parts and will utilize all of the "downloaded image"
22 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
23 * order to allow for BCH8 to fit in.
24 */
25 #undef CONFIG_SPL_TEXT_BASE
26 #define CONFIG_SPL_TEXT_BASE 0x40200000
27
28 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
29 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
30 #define CONFIG_SETUP_MEMORY_TAGS
31 #define CONFIG_INITRD_TAG
32 #define CONFIG_REVISION_TAG
33
34 /* Hardware drivers */
35
36 /* GPIO banks */
37 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
38
39 #define CONFIG_USB_OMAP3
40
41 /* select serial console configuration */
42 #undef CONFIG_CONS_INDEX
43 #define CONFIG_CONS_INDEX 1
44 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
45 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
46
47 /* commands to include */
48 #define CONFIG_CMD_NAND
49 #define CONFIG_CMD_MTDPARTS
50 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
51
52 /* I2C */
53 #define CONFIG_SYS_I2C_OMAP34XX
54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
55 #define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
56 #define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
57
58 /* USB */
59 #define CONFIG_USB_MUSB_OMAP2PLUS
60 #define CONFIG_USB_MUSB_PIO_ONLY
61 #define CONFIG_USB_ETHER
62 #define CONFIG_USB_ETHER_RNDIS
63 #define CONFIG_USB_FUNCTION_FASTBOOT
64 #define CONFIG_CMD_FASTBOOT
65 #define CONFIG_ANDROID_BOOT_IMAGE
66 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
67 #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
68
69 /* TWL4030 */
70 #define CONFIG_TWL4030_PWM
71 #define CONFIG_TWL4030_USB
72
73 /* Board NAND Info. */
74 #ifdef CONFIG_NAND
75 #define CONFIG_NAND_OMAP_GPMC
76
77 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
78 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
79 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
80
81 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
82 /* to access nand */
83 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
84 /* NAND devices */
85 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
86 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
87 #define CONFIG_SYS_NAND_PAGE_COUNT 64
88 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
89 #define CONFIG_SYS_NAND_OOBSIZE 64
90 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
91 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
92 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
93 13, 14, 16, 17, 18, 19, 20, 21, 22, \
94 23, 24, 25, 26, 27, 28, 30, 31, 32, \
95 33, 34, 35, 36, 37, 38, 39, 40, 41, \
96 42, 44, 45, 46, 47, 48, 49, 50, 51, \
97 52, 53, 54, 55, 56}
98
99 #define CONFIG_SYS_NAND_ECCSIZE 512
100 #define CONFIG_SYS_NAND_ECCBYTES 13
101 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
102 #define CONFIG_BCH
103 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
104 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
105 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
106 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
107 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
108 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
109 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
110 "512k(MLO),"\
111 "1792k(u-boot),"\
112 "128k(spl-os)," \
113 "128k(u-boot-env),"\
114 "6m(kernel),-(fs)"
115 #endif
116
117 /* Environment information */
118
119 #define CONFIG_PREBOOT \
120 "setenv preboot;" \
121 "nand unlock;" \
122 "saveenv;"
123
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125 DEFAULT_LINUX_BOOT_ENV \
126 "mtdids=" MTDIDS_DEFAULT "\0" \
127 "mtdparts=" MTDPARTS_DEFAULT "\0" \
128 "mmcdev=0\0" \
129 "mmcroot=/dev/mmcblk0p2 rw\0" \
130 "mmcrootfstype=ext4 rootwait\0" \
131 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
132 "nandrootfstype=ubifs rootwait\0" \
133 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
134 "if run loadbootscript; then " \
135 "run bootscript; " \
136 "else " \
137 "run defaultboot;" \
138 "fi; " \
139 "else run defaultboot; fi\0" \
140 "defaultboot=run mmcramboot\0" \
141 "consoledevice=ttyO0\0" \
142 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
143 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
144 "rotation=0\0" \
145 "vrfb_arg=if itest ${rotation} -ne 0; then " \
146 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
147 "omapfb.rotate=${rotation}; " \
148 "fi\0" \
149 "optargs=ignore_loglevel early_printk no_console_suspend\0" \
150 "common_bootargs=run setconsole; setenv bootargs " \
151 "${bootargs} "\
152 "console=${console} " \
153 "${mtdparts} "\
154 "${optargs}; " \
155 "run vrfb_arg\0" \
156 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
157 "bootscript=echo 'Running bootscript from mmc ...'; " \
158 "source ${loadaddr}\0" \
159 "loadimage=mmc rescan; " \
160 "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
161 "ramdisksize=64000\0" \
162 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
163 "loadramdisk=mmc rescan; " \
164 "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
165 "ramargs=setenv bootargs "\
166 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
167 "mmcargs=setenv bootargs "\
168 "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
169 "nandargs=setenv bootargs "\
170 "root=${nandroot} " \
171 "rootfstype=${nandrootfstype}\0" \
172 "nfsargs=setenv serverip ${tftpserver}; " \
173 "setenv bootargs root=/dev/nfs " \
174 "nfsroot=${nfsrootpath} " \
175 "ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
176 "nfsrootpath=/opt/nfs-exports/omap\0" \
177 "autoload=no\0" \
178 "loadfdt=mmc rescan; " \
179 "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
180 "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
181 "run mmcargs; " \
182 "run common_bootargs; " \
183 "run dump_bootargs; " \
184 "run loadimage; " \
185 "run loadfdt;\0 " \
186 "mmcbootz=setenv bootfile zImage; " \
187 "run mmcbootcommon; "\
188 "bootz ${loadaddr} - ${fdtaddr}\0" \
189 "mmcboot=setenv bootfile uImage; "\
190 "run mmcbootcommon; "\
191 "bootm ${loadaddr} - ${fdtaddr}\0" \
192 "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
193 "run ramargs; " \
194 "run common_bootargs; " \
195 "run dump_bootargs; " \
196 "run loadimage; " \
197 "run loadfdt; " \
198 "run loadramdisk\0" \
199 "mmcramboot=setenv bootfile uImage; " \
200 "run mmcrambootcommon; " \
201 "bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \
202 "mmcrambootz=setenv bootfile zImage; " \
203 "run mmcrambootcommon; " \
204 "bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \
205 "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
206 "run ramargs; " \
207 "run common_bootargs; " \
208 "run dump_bootargs; " \
209 "tftpboot ${loadaddr} ${zimage}; " \
210 "tftpboot ${rdaddr} ${ramdiskimage}; " \
211 "bootm ${loadaddr} ${rdaddr}\0" \
212 "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
213 "dhcp;" \
214 "run nfsargs;" \
215 "run common_bootargs;" \
216 "run dump_bootargs;" \
217 "tftpboot $loadaddr zImage;" \
218 "bootz $loadaddr\0" \
219 "nandbootcommon=echo 'Booting kernel from NAND...';" \
220 "nand unlock;" \
221 "run nandargs;" \
222 "run common_bootargs;" \
223 "run dump_bootargs;" \
224 "nand read ${loadaddr} kernel;" \
225 "nand read ${fdtaddr} spl-os;\0" \
226 "nandbootz=run nandbootcommon; "\
227 "bootz ${loadaddr} - ${fdtaddr}\0"\
228 "nandboot=run nandbootcommon; "\
229 "bootm ${loadaddr} - ${fdtaddr}\0"\
230
231 #define CONFIG_BOOTCOMMAND \
232 "run autoboot"
233
234 /* Miscellaneous configurable options */
235
236 /* memtest works on */
237 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
238 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
239 0x01F00000) /* 31MB */
240
241 /* FLASH and environment organization */
242
243 /* **** PISMO SUPPORT *** */
244 #if defined(CONFIG_CMD_NAND)
245 #define CONFIG_SYS_FLASH_BASE NAND_BASE
246 #endif
247
248 /* Monitor at start of flash */
249 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
250
251 #define CONFIG_ENV_IS_IN_NAND 1
252 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
253 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
254
255 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
256 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
257 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
258
259 /* SMSC922x Ethernet */
260 #if defined(CONFIG_CMD_NET)
261 #define CONFIG_SMC911X
262 #define CONFIG_SMC911X_32_BIT
263 #define CONFIG_SMC911X_BASE 0x08000000
264 #endif /* (CONFIG_CMD_NET) */
265
266 /* Defines for SPL */
267
268 #define CONFIG_SPL_OMAP3_ID_NAND
269
270 /* NAND: SPL falcon mode configs */
271 #ifdef CONFIG_SPL_OS_BOOT
272 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
273 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
274 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
275 #endif
276
277 #endif /* __CONFIG_H */