]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/omap3_logic.h
Merge branch 'master' of git://git.denx.de/u-boot-arm
[people/ms/u-boot.git] / include / configs / omap3_logic.h
1 /*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*
15 * High Level Configuration Options
16 */
17 #define CONFIG_OMAP /* in a TI OMAP core */
18 #define CONFIG_OMAP34XX /* which is a 34XX */
19 #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
20 #define CONFIG_OMAP_GPIO
21 #define CONFIG_OMAP_COMMON
22
23 #define CONFIG_SYS_TEXT_BASE 0x80400000
24
25 #define CONFIG_SDRC /* The chip has SDRC controller */
26
27 #include <asm/arch/cpu.h> /* get chip and board defs */
28 #include <asm/arch/omap3.h>
29
30 /*
31 * Display CPU and Board information
32 */
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
35
36 /* Clock Defines */
37 #define V_OSCK 26000000 /* Clock output from T2 */
38 #define V_SCLK (V_OSCK >> 1)
39
40 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
41
42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_INITRD_TAG
45 #define CONFIG_REVISION_TAG
46
47 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
48 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
49
50 /*
51 * Size of malloc() pool
52 */
53 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
54 /* Sector */
55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
56
57 /*
58 * Hardware drivers
59 */
60
61 /*
62 * NS16550 Configuration
63 */
64 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
65
66 #define CONFIG_SYS_NS16550
67 #define CONFIG_SYS_NS16550_SERIAL
68 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
69 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
70
71 /*
72 * select serial console configuration
73 */
74 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
76 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
77
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 115200}
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_MMC
85 #define CONFIG_OMAP_HSMMC
86 #define CONFIG_DOS_PARTITION
87
88 /* commands to include */
89 #include <config_cmd_default.h>
90
91 #define CONFIG_CMD_CACHE
92 #define CONFIG_CMD_EXT2 /* EXT2 Support */
93 #define CONFIG_CMD_FAT /* FAT support */
94 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
95 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
96 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
97 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
98 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
99 "1920k(u-boot),128k(u-boot-env),"\
100 "4m(kernel),-(fs)"
101
102 #define CONFIG_CMD_I2C /* I2C serial bus support */
103 #define CONFIG_CMD_MMC /* MMC support */
104 #define CONFIG_CMD_NAND /* NAND support */
105 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
106 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
107 #define CONFIG_CMD_PING
108 #define CONFIG_CMD_DHCP
109 #define CONFIG_CMD_SETEXPR /* Evaluate expressions */
110
111 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
112 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
113 #undef CONFIG_CMD_IMI /* iminfo */
114 #undef CONFIG_CMD_IMLS /* List all found images */
115
116 #define CONFIG_SYS_NO_FLASH
117
118 /*
119 * I2C
120 */
121 #define CONFIG_SYS_I2C
122 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
123 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
124 #define CONFIG_SYS_I2C_OMAP34XX
125
126 /*
127 * TWL4030
128 */
129 #define CONFIG_TWL4030_POWER
130
131 /*
132 * Board NAND Info.
133 */
134 #define CONFIG_SYS_NAND_QUIET_TEST
135 #define CONFIG_NAND_OMAP_GPMC
136 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
137 /* to access nand */
138 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
139 /* to access nand at */
140 /* CS0 */
141
142 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
143 /* NAND devices */
144 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
145 #define CONFIG_JFFS2_NAND
146 /* nand device jffs2 lives on */
147 #define CONFIG_JFFS2_DEV "nand0"
148 /* start of jffs2 partition */
149 #define CONFIG_JFFS2_PART_OFFSET 0x680000
150 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
151 /* partition */
152
153 /* Environment information */
154 #define CONFIG_BOOTDELAY 2
155
156 /*
157 * PREBOOT assumes the 4.3" display is attached. User can interrupt
158 * and modify display variable to suit their needs.
159 */
160 #define CONFIG_PREBOOT \
161 "echo ======================NOTICE============================;"\
162 "echo \"The u-boot environment is not set.\";" \
163 "echo \"If using a display a valid display varible for your panel\";" \
164 "echo \"needs to be set.\";" \
165 "echo \"Valid display options are:\";" \
166 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
167 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
168 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
169 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
170 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
171 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
172 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
173 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
174 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
175 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
176 "setenv display 15;" \
177 "setenv preboot;" \
178 "saveenv;"
179
180
181 #define CONFIG_EXTRA_ENV_SETTINGS \
182 "loadaddr=0x81000000\0" \
183 "bootfile=uImage\0" \
184 "mtdids=" MTDIDS_DEFAULT "\0" \
185 "mtdparts=" MTDPARTS_DEFAULT "\0" \
186 "mmcdev=0\0" \
187 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
188 "if run loadbootscript; then " \
189 "run bootscript; " \
190 "else " \
191 "run defaultboot;" \
192 "fi; " \
193 "else run defaultboot; fi\0" \
194 "defaultboot=run mmcramboot\0" \
195 "consoledevice=ttyO0\0" \
196 "display=15\0" \
197 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
198 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
199 "rotation=0\0" \
200 "vrfb_arg=if itest ${rotation} -ne 0; then " \
201 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
202 "omapfb.rotate=${rotation}; " \
203 "fi\0" \
204 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
205 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
206 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
207 "${otherbootargs};" \
208 "run addmtdparts; " \
209 "run vrfb_arg\0" \
210 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
211 "bootscript=echo 'Running bootscript from mmc ...'; " \
212 "source ${loadaddr}\0" \
213 "loaduimage=mmc rescan ${mmcdev}; " \
214 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
215 "ramdisksize=64000\0" \
216 "ramdiskaddr=0x82000000\0" \
217 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
218 "ramargs=run setconsole; setenv bootargs console=${console} " \
219 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
220 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
221 "run ramargs; " \
222 "run common_bootargs; " \
223 "run dump_bootargs; " \
224 "run loaduimage; " \
225 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
226 "bootm ${loadaddr} ${ramdiskaddr}\0" \
227 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
228 "run ramargs; " \
229 "run common_bootargs; " \
230 "run dump_bootargs; " \
231 "tftpboot ${loadaddr} ${bootfile}; "\
232 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
233 "bootm ${loadaddr} ${ramdiskaddr}\0"
234
235 #define CONFIG_BOOTCOMMAND \
236 "run autoboot"
237
238 #define CONFIG_AUTO_COMPLETE
239 /*
240 * Miscellaneous configurable options
241 */
242 #define CONFIG_SYS_LONGHELP /* undef to save memory */
243 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
244 #define CONFIG_SYS_PROMPT "OMAP Logic # "
245 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
246 /* Print Buffer Size */
247 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
248 sizeof(CONFIG_SYS_PROMPT) + 16)
249 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
250 /* Boot Argument Buffer Size */
251 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
252 /* memtest works on */
253 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
254 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
255 0x01F00000) /* 31MB */
256
257 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
258 /* address */
259
260 /*
261 * OMAP3 has 12 GP timers, they can be driven by the system clock
262 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
263 * This rate is divided by a local divisor.
264 */
265 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
266 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
267
268 /*
269 * Physical Memory Map
270 */
271 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
272 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
273 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
274
275 /*
276 * FLASH and environment organization
277 */
278
279 /* **** PISMO SUPPORT *** */
280 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
281
282 #if defined(CONFIG_CMD_NAND)
283 #define CONFIG_SYS_FLASH_BASE NAND_BASE
284 #elif defined(CONFIG_CMD_ONENAND)
285 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
286 #endif
287
288 /* Monitor at start of flash */
289 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
290
291 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
292
293 #if defined(CONFIG_CMD_NAND)
294 #define CONFIG_NAND_OMAP_GPMC
295 #define CONFIG_ENV_IS_IN_NAND
296 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
297 #endif
298
299 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
300 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
301
302 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
303 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
304 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
305 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
306 CONFIG_SYS_INIT_RAM_SIZE - \
307 GENERATED_GBL_DATA_SIZE)
308
309 /*
310 * SMSC922x Ethernet
311 */
312 #if defined(CONFIG_CMD_NET)
313
314 #define CONFIG_SMC911X
315 #define CONFIG_SMC911X_16_BIT
316 #define CONFIG_SMC911X_BASE 0x08000000
317
318 #endif /* (CONFIG_CMD_NET) */
319
320 /*
321 * BOOTP fields
322 */
323
324 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
325 #define CONFIG_BOOTP_GATEWAY 0x00000002
326 #define CONFIG_BOOTP_HOSTNAME 0x00000004
327 #define CONFIG_BOOTP_BOOTPATH 0x00000010
328
329 #endif /* __CONFIG_H */