]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/omap3_mvblx.h
config: remove platform CONFIG_SYS_HZ definition part 1/2
[people/ms/u-boot.git] / include / configs / omap3_mvblx.h
1 /*
2 * MATRIX VISION GmbH mvBlueLYNX-X
3 *
4 * Derived from omap3_beagle.h:
5 * (C) Copyright 2006-2008
6 * Texas Instruments.
7 * Richard Woodruff <r-woodruff2@ti.com>
8 * Syed Mohammed Khasim <x0khasim@ti.com>
9 *
10 * Configuration settings for the TI OMAP3530 Beagle board.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /*
19 * High Level Configuration Options
20 */
21 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
22 #define CONFIG_OMAP 1 /* in a TI OMAP core */
23 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
24 #define CONFIG_MVBLX 1 /* working with mvBlueLYNX-X */
25 #define CONFIG_MACH_TYPE MACH_TYPE_MVBLX
26 #define CONFIG_OMAP_GPIO
27 #define CONFIG_OMAP_COMMON
28
29 #define CONFIG_SDRC /* The chip has SDRC controller */
30
31 #include <asm/arch/cpu.h> /* get chip and board defs */
32 #include <asm/arch/omap3.h>
33
34 /*
35 * Display CPU and Board information
36 */
37 #define CONFIG_DISPLAY_CPUINFO 1
38 #define CONFIG_DISPLAY_BOARDINFO 1
39
40 /* Clock Defines */
41 #define V_OSCK 26000000 /* Clock output from T2 */
42 #define V_SCLK (V_OSCK >> 1)
43
44 #define CONFIG_MISC_INIT_R
45
46 #define CONFIG_OF_LIBFDT 1
47
48 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS 1
50 #define CONFIG_INITRD_TAG 1
51 #define CONFIG_REVISION_TAG 1
52 #define CONFIG_SERIAL_TAG 1
53
54 /*
55 * Size of malloc() pool
56 */
57 #define CONFIG_ENV_SIZE (2 << 10) /* 2 KiB */
58 /* Sector */
59 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
60
61 /*
62 * Hardware drivers
63 */
64
65 /*
66 * NS16550 Configuration
67 */
68 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
69
70 #define CONFIG_SYS_NS16550
71 #define CONFIG_SYS_NS16550_SERIAL
72 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
73 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
74
75 /*
76 * select serial console configuration
77 */
78 #define CONFIG_CONS_INDEX 1
79 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
80 #define CONFIG_SERIAL1 1 /* UART1 */
81
82 #define CONFIG_BAUDRATE 115200
83 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
84 115200}
85 #define CONFIG_GENERIC_MMC 1
86 #define CONFIG_MMC 1
87 #define CONFIG_OMAP_HSMMC 1
88 #define CONFIG_DOS_PARTITION 1
89
90 /* silent console by default */
91 #define CONFIG_SYS_DEVICE_NULLDEV 1
92 #define CONFIG_SILENT_CONSOLE 1
93
94 /* USB */
95 #define CONFIG_MUSB_UDC 1
96 #define CONFIG_USB_OMAP3 1
97 #define CONFIG_TWL4030_USB 1
98
99 /* USB device configuration */
100 #define CONFIG_USB_DEVICE 1
101 #define CONFIG_USB_TTY 1
102 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
103 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
104 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 1
105 #define CONFIG_USBD_VENDORID 0x164c
106 #define CONFIG_USBD_PRODUCTID_GSERIAL 0x0201
107 #define CONFIG_USBD_PRODUCTID_CDCACM 0x0201
108 #define CONFIG_USBD_MANUFACTURER "MATRIX VISION GmbH"
109 #define CONFIG_USBD_PRODUCT_NAME "mvBlueLYNX-X"
110
111 /* no FLASH available */
112 #define CONFIG_SYS_NO_FLASH
113
114 /* commands to include */
115 #include <config_cmd_default.h>
116
117 #define CONFIG_CMD_CACHE
118 #define CONFIG_CMD_EXT2 /* EXT2 Support */
119 #define CONFIG_CMD_FAT /* FAT support */
120 #define CONFIG_CMD_I2C /* I2C serial bus support */
121 #define CONFIG_CMD_MMC /* MMC support */
122 #define CONFIG_CMD_EEPROM
123 #define CONFIG_CMD_IMI /* iminfo */
124 #undef CONFIG_CMD_IMLS /* List all found images */
125 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
126 #define CONFIG_CMD_NFS /* NFS support */
127 #define CONFIG_CMD_DHCP
128 #define CONFIG_CMD_PING
129 #define CONFIG_CMD_FPGA
130
131 #define CONFIG_HARD_I2C 1
132 #define CONFIG_SYS_I2C_SPEED 100000
133 #define CONFIG_SYS_I2C_SLAVE 0
134 #define CONFIG_DRIVER_OMAP34XX_I2C 1
135 #define CONFIG_I2C_MULTI_BUS 1
136
137 /*
138 * TWL4030
139 */
140 #define CONFIG_TWL4030_POWER 1
141
142 /* Environment information */
143 #undef CONFIG_ENV_OVERWRITE /* disallow overwriting serial# and ethaddr */
144 #define CONFIG_BOOTDELAY 0
145 #define CONFIG_ZERO_BOOTDELAY_CHECK
146 #define CONFIG_AUTOBOOT_KEYED
147 #define CONFIG_AUTOBOOT_STOP_STR "S"
148
149 #define CONFIG_EXTRA_ENV_SETTINGS \
150 "silent=true\0" \
151 "loadaddr=0x82000000\0" \
152 "usbtty=cdc_acm\0" \
153 "console=ttyO0,115200n8\0" \
154 "mpurate=600\0" \
155 "vram=12M\0" \
156 "dvimode=1024x768-24@60\0" \
157 "defaultdisplay=dvi\0" \
158 "loadfpga=if ext2load mmc ${mmcdev}:2 ${loadaddr} "\
159 "/lib/firmware/mvblx/${fpgafilename}; then " \
160 "fpga load 0 ${loadaddr} ${filesize}; " \
161 "fi;\0" \
162 "mmcdev=0\0" \
163 "mmcroot=/dev/mmcblk0p2 rw\0" \
164 "mmcrootfstype=ext3 rootwait\0" \
165 "mmcargs=setenv bootargs console=${console} " \
166 "mpurate=${mpurate} " \
167 "vram=${vram} " \
168 "omapfb.mode=dvi:${dvimode} " \
169 "omapfb.debug=y " \
170 "omapdss.def_disp=${defaultdisplay} " \
171 "root=${mmcroot} " \
172 "rootfstype=${mmcrootfstype} " \
173 "mvfw.fpgavers=${fpgavers} " \
174 "${cmdline_suffix}\0" \
175 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
176 "importbootenv=echo Importing environment from mmc ...; " \
177 "env import -t $loadaddr $filesize\0" \
178 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
179 "mmcboot=echo Booting from mmc ...; " \
180 "run mmcargs; " \
181 "bootm ${loadaddr}\0" \
182 "mmcbootcmd= " \
183 "echo Trying mmc${mmcdev}; " \
184 "mmc dev ${mmcdev}; " \
185 "if mmc rescan; then " \
186 "setenv mmcroot /dev/mmcblk${mmcdev}p2 rw; " \
187 "echo SD/MMC found on device ${mmcdev};" \
188 "if run loadbootenv; then " \
189 "echo Loading boot environment from mmc${mmcdev}; " \
190 "run importbootenv; " \
191 "fi;" \
192 "run loadfpga; " \
193 "if test -n $uenvcmd; then " \
194 "echo Running uenvcmd ...;" \
195 "run uenvcmd;" \
196 "fi;" \
197 "if run loaduimage; then " \
198 "run mmcboot; " \
199 "fi;" \
200 "fi\0"
201
202 #define CONFIG_BOOTCOMMAND \
203 "setenv mmcdev 1;" \
204 "run mmcbootcmd || " \
205 "setenv mmcdev 0;" \
206 "run mmcbootcmd"
207
208
209 #define CONFIG_AUTO_COMPLETE 1
210 /*
211 * Miscellaneous configurable options
212 */
213 #define CONFIG_SYS_LONGHELP /* undef to save memory */
214 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
215 #define CONFIG_SYS_PROMPT "mvblx # "
216 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
217 /* Print Buffer Size */
218 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
219 sizeof(CONFIG_SYS_PROMPT) + 16)
220 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
221 /* Boot Argument Buffer Size */
222 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
223
224 #define CONFIG_SYS_ALT_MEMTEST 1 /* alternative memtest with looping */
225 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest works on */
226 #define CONFIG_SYS_MEMTEST_END (0x9dffffff) /* end = 448 MB */
227 #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
228
229 /* default load address */
230 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
231
232 /*
233 * OMAP3 has 12 GP timers, they can be driven by the system clock
234 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
235 * This rate is divided by a local divisor.
236 */
237 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
238 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
239 #define CONFIG_SYS_HZ 1000
240
241 /*-----------------------------------------------------------------------
242 * Physical Memory Map
243 */
244 #define CONFIG_NR_DRAM_BANKS 1
245 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
246 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
247
248 #define CONFIG_ENV_IS_NOWHERE 1
249
250 /*----------------------------------------------------------------------------
251 * Network Subsystem (SMSC9211 Ethernet from SMSC9118 family)
252 *----------------------------------------------------------------------------
253 */
254 #if defined(CONFIG_CMD_NET)
255 #define CONFIG_SMC911X 1
256 #define CONFIG_SMC911X_32_BIT
257 #define CONFIG_SMC911X_BASE 0x2C000000
258 #endif /* (CONFIG_CMD_NET) */
259
260 #define CONFIG_FPGA_COUNT 1
261 #define CONFIG_FPGA
262 #define CONFIG_FPGA_ALTERA
263 #define CONFIG_FPGA_CYCLON2
264 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
265 #define CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
266
267 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 0xA0>>1 */
268 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
269 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 2^4 = 16-byte pages */
270 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
271 #define CONFIG_SYS_EEPROM_SIZE 256 /* Bytes */
272 #define CONFIG_ID_EEPROM
273 #define CONFIG_SYS_EEPROM_BUS_NUM 2
274
275 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
276 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
277 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
278 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
279 CONFIG_SYS_INIT_RAM_SIZE - \
280 GENERATED_GBL_DATA_SIZE)
281
282 #define CONFIG_OMAP3_SPI
283
284 #define CONFIG_SYS_CACHELINE_SIZE 64
285
286 #endif /* __CONFIG_H */