include/configs/omap3_mvblx.h

   1 /*
   2  * MATRIX VISION GmbH mvBlueLYNX-X
   3  *
   4  * Derived from omap3_beagle.h:
   5  * (C) Copyright 2006-2008
   6  * Texas Instruments.
   7  * Richard Woodruff <r-woodruff2@ti.com>
   8  * Syed Mohammed Khasim <x0khasim@ti.com>
   9  *
  10  * Configuration settings for the TI OMAP3530 Beagle board.
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28  * MA 02111-1307 USA
  29  */
  30
  31 #ifndef __CONFIG_H
  32 #define __CONFIG_H
  33
  34 /*
  35  * High Level Configuration Options
  36  */
  37 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  38 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  39 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  40 #define CONFIG_MVBLX            1       /* working with mvBlueLYNX-X */
  41 #define CONFIG_MACH_TYPE        MACH_TYPE_MVBLX
  42
  43 #define CONFIG_SDRC     /* The chip has SDRC controller */
  44
  45 #include <asm/arch/cpu.h>               /* get chip and board defs */
  46 #include <asm/arch/omap3.h>
  47
  48 /*
  49  * Display CPU and Board information
  50  */
  51 #define CONFIG_DISPLAY_CPUINFO          1
  52 #define CONFIG_DISPLAY_BOARDINFO        1
  53
  54 /* Clock Defines */
  55 #define V_OSCK                  26000000        /* Clock output from T2 */
  56 #define V_SCLK                  (V_OSCK >> 1)
  57
  58 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  59 #define CONFIG_MISC_INIT_R
  60
  61 #define CONFIG_OF_LIBFDT                1
  62
  63 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  64 #define CONFIG_SETUP_MEMORY_TAGS        1
  65 #define CONFIG_INITRD_TAG               1
  66 #define CONFIG_REVISION_TAG             1
  67 #define CONFIG_SERIAL_TAG               1
  68
  69 /*
  70  * Size of malloc() pool
  71  */
  72 #define CONFIG_ENV_SIZE                 (2 << 10)       /* 2 KiB */
  73                                                 /* Sector */
  74 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  75
  76 /*
  77  * Hardware drivers
  78  */
  79
  80 /*
  81  * NS16550 Configuration
  82  */
  83 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  84
  85 #define CONFIG_SYS_NS16550
  86 #define CONFIG_SYS_NS16550_SERIAL
  87 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  88 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  89
  90 /*
  91  * select serial console configuration
  92  */
  93 #define CONFIG_CONS_INDEX               3
  94 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  95 #define CONFIG_SERIAL3                  3       /* UART3 */
  96
  97 #define CONFIG_BAUDRATE                 115200
  98 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  99                                         115200}
 100 #define CONFIG_GENERIC_MMC              1
 101 #define CONFIG_MMC                      1
 102 #define CONFIG_OMAP_HSMMC               1
 103 #define CONFIG_DOS_PARTITION            1
 104
 105 /* DDR - I use Micron DDR */
 106 #define CONFIG_OMAP3_MICRON_DDR         1
 107
 108 /* USB */
 109 #define CONFIG_MUSB_UDC                 1
 110 #define CONFIG_USB_OMAP3                1
 111 #define CONFIG_TWL4030_USB              1
 112
 113 /* USB device configuration */
 114 #define CONFIG_USB_DEVICE               1
 115 #define CONFIG_USB_TTY                  1
 116 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 117 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
 118 #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 1
 119 #define CONFIG_USBD_VENDORID                    0x164c
 120 #define CONFIG_USBD_PRODUCTID_GSERIAL   0x0201
 121 #define CONFIG_USBD_PRODUCTID_CDCACM    0x0201
 122 #define CONFIG_USBD_MANUFACTURER                "MATRIX VISION GmbH"
 123 #define CONFIG_USBD_PRODUCT_NAME                "mvBlueLYNX-X"
 124
 125 /* no FLASH available */
 126 #define CONFIG_SYS_NO_FLASH
 127
 128 /* commands to include */
 129 #include <config_cmd_default.h>
 130
 131 #define CONFIG_CMD_CACHE
 132 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 133 #define CONFIG_CMD_FAT          /* FAT support                  */
 134 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 135 #define CONFIG_CMD_MMC          /* MMC support                  */
 136 #define CONFIG_CMD_EEPROM
 137 #define CONFIG_CMD_IMI          /* iminfo                       */
 138 #undef CONFIG_CMD_IMLS          /* List all found images        */
 139 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 140 #define CONFIG_CMD_NFS          /* NFS support                  */
 141 #define CONFIG_CMD_DHCP
 142 #define CONFIG_CMD_PING
 143 #define CONFIG_CMD_FPGA
 144
 145 #define CONFIG_HARD_I2C                 1
 146 #define CONFIG_SYS_I2C_SPEED            100000
 147 #define CONFIG_SYS_I2C_SLAVE            0
 148 #define CONFIG_SYS_I2C_BUS              0 /* This isn't used anywhere ?? */
 149 #define CONFIG_SYS_I2C_BUS_SELECT       1 /* This isn't used anywhere ?? */
 150 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 151 #define CONFIG_I2C_MULTI_BUS            1
 152
 153 /*
 154  * TWL4030
 155  */
 156 #define CONFIG_TWL4030_POWER            1
 157
 158 /* Environment information */
 159 #undef CONFIG_ENV_OVERWRITE     /* disallow overwriting serial# and ethaddr */
 160 #define CONFIG_BOOTDELAY                3
 161
 162 #define CONFIG_EXTRA_ENV_SETTINGS \
 163         "loadaddr=0x82000000\0" \
 164         "usbtty=cdc_acm\0" \
 165         "console=ttyO2,115200n8\0" \
 166         "mpurate=600\0" \
 167         "vram=12M\0" \
 168         "dvimode=1024x768-24@60\0" \
 169         "defaultdisplay=dvi\0" \
 170         "fpgafilename=mvbluelynx_x.rbf\0" \
 171         "loadfpga=if fatload mmc ${mmcdev} ${loadaddr} ${fpgafilename}; then " \
 172                 "fpga load 0 ${loadaddr} ${filesize}; " \
 173                 "fi;\0" \
 174         "mmcdev=0\0" \
 175         "mmcroot=/dev/mmcblk0p2 rw\0" \
 176         "mmcrootfstype=ext3 rootwait\0" \
 177         "mmcargs=setenv bootargs console=${console} " \
 178                 "mpurate=${mpurate} " \
 179                 "vram=${vram} " \
 180                 "omapfb.mode=dvi:${dvimode} " \
 181                 "omapfb.debug=y " \
 182                 "omapdss.def_disp=${defaultdisplay} " \
 183                 "root=${mmcroot} " \
 184                 "rootfstype=${mmcrootfstype} " \
 185                 "${cmdline_suffix}\0" \
 186         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 187         "importbootenv=echo Importing environment from mmc ...; " \
 188                 "env import -t $loadaddr $filesize\0" \
 189         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 190         "mmcboot=echo Booting from mmc ...; " \
 191                 "run mmcargs; " \
 192                 "bootm ${loadaddr}\0" \
 193         "mmcbootcmd= " \
 194                 "echo Trying mmc${mmcdev}; " \
 195                 "mmc dev ${mmcdev}; " \
 196                 "if mmc rescan; then " \
 197                         "setenv mmcroot /dev/mmcblk${mmcdev}p2 rw; " \
 198                         "echo SD/MMC found on device ${mmcdev};" \
 199                         "if run loadbootenv; then " \
 200                            "echo Loading boot environment from mmc${mmcdev}; " \
 201                            "run importbootenv; " \
 202                         "fi;" \
 203                         "run loadfpga; " \
 204                         "if test -n $uenvcmd; then " \
 205                                 "echo Running uenvcmd ...;" \
 206                                 "run uenvcmd;" \
 207                         "fi;" \
 208                         "if run loaduimage; then " \
 209                                 "run mmcboot; " \
 210                         "fi;" \
 211                 "fi\0"
 212
 213 #define CONFIG_BOOTCOMMAND \
 214         "setenv mmcdev 1;" \
 215         "run mmcbootcmd || " \
 216         "setenv mmcdev 0;" \
 217         "run mmcbootcmd"
 218
 219
 220 #define CONFIG_AUTO_COMPLETE            1
 221 /*
 222  * Miscellaneous configurable options
 223  */
 224 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 225 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 226 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 227 #define CONFIG_SYS_PROMPT               "mvblx # "
 228 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 229 /* Print Buffer Size */
 230 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 231                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 232 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 233 /* Boot Argument Buffer Size */
 234 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 235
 236 #define CONFIG_SYS_ALT_MEMTEST      1 /* alternative memtest with looping */
 237 #define CONFIG_SYS_MEMTEST_START        (0x82000000)    /* memtest works on */
 238 #define CONFIG_SYS_MEMTEST_END          (0x9dffffff)    /* end = 448 MB */
 239 #define CONFIG_SYS_MEMTEST_SCRATCH      (0x81000000)    /* dummy address */
 240
 241 /* default load address */
 242 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
 243
 244 /*
 245  * OMAP3 has 12 GP timers, they can be driven by the system clock
 246  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 247  * This rate is divided by a local divisor.
 248  */
 249 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 250 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 251 #define CONFIG_SYS_HZ                   1000
 252
 253 /*-----------------------------------------------------------------------
 254  * Stack sizes
 255  *
 256  * The stack sizes are set up in start.S using the settings below
 257  */
 258 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 259
 260 /*-----------------------------------------------------------------------
 261  * Physical Memory Map
 262  */
 263 #define CONFIG_NR_DRAM_BANKS    1
 264 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 265 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 266 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 267
 268 #define CONFIG_ENV_IS_NOWHERE   1
 269
 270 /*----------------------------------------------------------------------------
 271  * Network Subsystem (SMSC9211 Ethernet from SMSC9118 family)
 272  *----------------------------------------------------------------------------
 273  */
 274 #if defined(CONFIG_CMD_NET)
 275   #define CONFIG_NET_MULTI
 276   #define CONFIG_SMC911X                1
 277   #define CONFIG_SMC911X_32_BIT
 278   #define CONFIG_SMC911X_BASE     0x2C000000
 279 #endif /* (CONFIG_CMD_NET) */
 280
 281 #define CONFIG_FPGA_COUNT       1
 282 #define CONFIG_FPGA          CONFIG_SYS_ALTERA_CYCLON2
 283 #define CONFIG_FPGA_ALTERA
 284 #define CONFIG_FPGA_CYCLON2
 285 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 286 #define CONFIG_SYS_FPGA_DONT_USE_CONF_DONE
 287
 288 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 0xA0>>1 */
 289 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
 290 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4  /* 2^4 = 16-byte pages */
 291 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 292 #define CONFIG_SYS_EEPROM_SIZE 256 /* Bytes */
 293 #define CONFIG_ID_EEPROM
 294 #define CONFIG_SYS_EEPROM_BUS_NUM       2
 295
 296 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 297 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 298 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 299 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 300                                          CONFIG_SYS_INIT_RAM_SIZE - \
 301                                          GENERATED_GBL_DATA_SIZE)
 302
 303 #define CONFIG_OMAP3_SPI
 304
 305 #define CONFIG_SYS_CACHELINE_SIZE       64
 306
 307 #endif /* __CONFIG_H */