include/configs/omap3_zoom1.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  * Nishanth Menon <nm@ti.com>
   7  *
   8  * Configuration settings for the TI OMAP3430 Zoom MDK board.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /*
  17  * High Level Configuration Options
  18  */
  19 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  20 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  21 #define CONFIG_OMAP3_ZOOM1      1       /* working with Zoom MDK Rev1 */
  22
  23 #define CONFIG_SDRC     /* The chip has SDRC controller */
  24
  25 #include <asm/arch/cpu.h>               /* get chip and board defs */
  26 #include <asm/arch/omap3.h>
  27
  28 /*
  29  * Display CPU and Board information
  30  */
  31 #define CONFIG_DISPLAY_CPUINFO          1
  32 #define CONFIG_DISPLAY_BOARDINFO        1
  33
  34 /* Clock Defines */
  35 #define V_OSCK                  26000000        /* Clock output from T2 */
  36 #define V_SCLK                  (V_OSCK >> 1)
  37
  38 #define CONFIG_MISC_INIT_R
  39
  40 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  41 #define CONFIG_SETUP_MEMORY_TAGS        1
  42 #define CONFIG_INITRD_TAG               1
  43 #define CONFIG_REVISION_TAG             1
  44
  45 #define CONFIG_OF_LIBFDT                1
  46
  47 /*
  48  * Size of malloc() pool
  49  */
  50 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  51                                                 /* Sector */
  52 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  53
  54 /*
  55  * Hardware drivers
  56  */
  57
  58 /*
  59  * NS16550 Configuration
  60  */
  61 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  62
  63 #define CONFIG_SYS_NS16550
  64 #define CONFIG_SYS_NS16550_SERIAL
  65 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  66 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  67
  68 /*
  69  * select serial console configuration
  70  */
  71 #define CONFIG_CONS_INDEX               3
  72 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  73 #define CONFIG_SERIAL3                  3       /* UART3 */
  74
  75 /* allow to overwrite serial and ethaddr */
  76 #define CONFIG_ENV_OVERWRITE
  77 #define CONFIG_BAUDRATE                 115200
  78 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  79                                         115200}
  80 #define CONFIG_GENERIC_MMC              1
  81 #define CONFIG_MMC                      1
  82 #define CONFIG_OMAP_HSMMC               1
  83 #define CONFIG_DOS_PARTITION            1
  84
  85 /* USB */
  86 #define CONFIG_MUSB_UDC                 1
  87 #define CONFIG_USB_OMAP3                1
  88 #define CONFIG_TWL4030_USB              1
  89
  90 /* USB device configuration */
  91 #define CONFIG_USB_DEVICE               1
  92 #define CONFIG_USB_TTY                  1
  93 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
  94 /* Change these to suit your needs */
  95 #define CONFIG_USBD_VENDORID            0x0451
  96 #define CONFIG_USBD_PRODUCTID           0x5678
  97 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
  98 #define CONFIG_USBD_PRODUCT_NAME        "Zoom1"
  99
 100 /* commands to include */
 101 #include <config_cmd_default.h>
 102
 103 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 104 #define CONFIG_CMD_FAT          /* FAT support                  */
 105 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 106
 107 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 108 #define CONFIG_CMD_MMC          /* MMC support                  */
 109 #define CONFIG_CMD_NAND         /* NAND support                 */
 110 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
 111
 112 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 113 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 114 #undef CONFIG_CMD_IMI           /* iminfo                       */
 115 #undef CONFIG_CMD_IMLS          /* List all found images        */
 116 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 117 #undef CONFIG_CMD_NFS           /* NFS support                  */
 118
 119 #define CONFIG_SYS_NO_FLASH
 120 #define CONFIG_HARD_I2C                 1
 121 #define CONFIG_SYS_I2C_SPEED            100000
 122 #define CONFIG_SYS_I2C_SLAVE            1
 123 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 124
 125 /*
 126  * TWL4030
 127  */
 128 #define CONFIG_TWL4030_POWER            1
 129 #define CONFIG_TWL4030_LED              1
 130
 131 /*
 132  * Board NAND Info.
 133  */
 134 #define CONFIG_NAND_OMAP_GPMC
 135 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 136                                                         /* to access nand */
 137 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 138                                                         /* to access nand at */
 139                                                         /* CS0 */
 140 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 141
 142 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 143                                                         /* devices */
 144 #define CONFIG_JFFS2_NAND
 145 /* nand device jffs2 lives on */
 146 #define CONFIG_JFFS2_DEV                "nand0"
 147 /* start of jffs2 partition */
 148 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 149 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 150                                                         /* partition */
 151
 152 /* Environment information */
 153 #define CONFIG_BOOTDELAY                10
 154
 155 #define CONFIG_EXTRA_ENV_SETTINGS \
 156         "loadaddr=0x82000000\0" \
 157         "usbtty=cdc_acm\0" \
 158         "console=ttyS2,115200n8\0" \
 159         "mmcdev=0\0" \
 160         "videomode=1024x768@60,vxres=1024,vyres=768\0" \
 161         "videospec=omapfb:vram:2M,vram:4M\0" \
 162         "mmcargs=setenv bootargs console=${console} " \
 163                 "video=${videospec},mode:${videomode} " \
 164                 "root=/dev/mmcblk0p2 rw " \
 165                 "rootfstype=ext3 rootwait\0" \
 166         "nandargs=setenv bootargs console=${console} " \
 167                 "video=${videospec},mode:${videomode} " \
 168                 "root=/dev/mtdblock4 rw " \
 169                 "rootfstype=jffs2\0" \
 170         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 171         "bootscript=echo Running bootscript from mmc ...; " \
 172                 "source ${loadaddr}\0" \
 173         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 174         "mmcboot=echo Booting from mmc ...; " \
 175                 "run mmcargs; " \
 176                 "bootm ${loadaddr}\0" \
 177         "nandboot=echo Booting from nand ...; " \
 178                 "run nandargs; " \
 179                 "nand read ${loadaddr} 280000 400000; " \
 180                 "bootm ${loadaddr}\0" \
 181
 182 #define CONFIG_BOOTCOMMAND \
 183         "mmc dev ${mmcdev}; if mmc rescan; then " \
 184                 "if run loadbootscript; then " \
 185                         "run bootscript; " \
 186                 "else " \
 187                         "if run loaduimage; then " \
 188                                 "run mmcboot; " \
 189                         "else run nandboot; " \
 190                         "fi; " \
 191                 "fi; " \
 192         "else run nandboot; fi"
 193
 194 #define CONFIG_AUTO_COMPLETE            1
 195 /*
 196  * Miscellaneous configurable options
 197  */
 198 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 199 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 200 #define CONFIG_SYS_PROMPT               "OMAP3 Zoom1 # "
 201 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 202 /* Print Buffer Size */
 203 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 204                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 205 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 206 /* Boot Argument Buffer Size */
 207 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 208
 209 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 210                                                                 /* works on */
 211 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 212                                         0x01F00000) /* 31MB */
 213
 214 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 215                                                         /* load address */
 216
 217 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 218 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 219 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 220 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 221                                          CONFIG_SYS_INIT_RAM_SIZE - \
 222                                          GENERATED_GBL_DATA_SIZE)
 223 /*
 224  * OMAP3 has 12 GP timers, they can be driven by the system clock
 225  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 226  * This rate is divided by a local divisor.
 227  */
 228 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 229 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 230 #define CONFIG_SYS_HZ                   1000
 231
 232 /*-----------------------------------------------------------------------
 233  * Physical Memory Map
 234  */
 235 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 236 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 237 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 238
 239 /*-----------------------------------------------------------------------
 240  * FLASH and environment organization
 241  */
 242
 243 /* **** PISMO SUPPORT *** */
 244
 245 /* Configure the PISMO */
 246 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 247 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 248
 249 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 250
 251 #if defined(CONFIG_CMD_NAND)
 252 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 253 #endif
 254
 255 /* Monitor at start of flash */
 256 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 257 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 258
 259 #define CONFIG_ENV_IS_IN_NAND           1
 260 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 261 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 262
 263 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 264 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 265 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 266
 267 #define CONFIG_SYS_CACHELINE_SIZE       64
 268
 269 #endif                          /* __CONFIG_H */