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1 /*
2 * (C) Copyright 2006-2009
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 * Nishanth Menon <nm@ti.com>
7 * Tom Rix <Tom.Rix@windriver.com>
8 *
9 * Configuration settings for the TI OMAP3430 Zoom II board.
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30 #ifndef __CONFIG_H
31 #define __CONFIG_H
32
33 /*
34 * High Level Configuration Options
35 */
36 #define CONFIG_OMAP 1 /* in a TI OMAP core */
37 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
38 #define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
39
40 #define CONFIG_SDRC /* The chip has SDRC controller */
41
42 #include <asm/arch/cpu.h> /* get chip and board defs */
43 #include <asm/arch/omap3.h>
44
45 /*
46 * Display CPU and Board information
47 */
48 #define CONFIG_DISPLAY_CPUINFO 1
49 #define CONFIG_DISPLAY_BOARDINFO 1
50
51 /* Clock Defines */
52 #define V_OSCK 26000000 /* Clock output from T2 */
53 #define V_SCLK (V_OSCK >> 1)
54
55 #undef CONFIG_USE_IRQ /* no support for IRQs */
56 #define CONFIG_MISC_INIT_R
57
58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS 1
60 #define CONFIG_INITRD_TAG 1
61 #define CONFIG_REVISION_TAG 1
62
63 #define CONFIG_OF_LIBFDT 1
64
65 /*
66 * Size of malloc() pool
67 */
68 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
69 /* Sector */
70 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
71 /*
72 * Hardware drivers
73 */
74
75 /*
76 * NS16550 Configuration
77 * Zoom2 uses the TL16CP754C on the debug board
78 */
79 #define CONFIG_SERIAL_MULTI 1
80 /*
81 * 0 - 1 : first USB with respect to the left edge of the debug board
82 * 2 - 3 : second USB with respect to the left edge of the debug board
83 */
84 #define ZOOM2_DEFAULT_SERIAL_DEVICE (&zoom2_serial_device0)
85
86 #define V_NS16550_CLK (1843200) /* 1.8432 Mhz */
87
88 #define CONFIG_SYS_NS16550
89 #define CONFIG_SYS_NS16550_REG_SIZE (-2)
90 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
91 #define CONFIG_BAUDRATE 115200
92 #define CONFIG_SYS_BAUDRATE_TABLE {115200}
93
94 /* allow to overwrite serial and ethaddr */
95 #define CONFIG_ENV_OVERWRITE
96
97 #define CONFIG_GENERIC_MMC 1
98 #define CONFIG_MMC 1
99 #define CONFIG_OMAP_HSMMC 1
100 #define CONFIG_DOS_PARTITION 1
101
102 /* Status LED */
103 #define CONFIG_STATUS_LED 1 /* Status LED enabled */
104 #define CONFIG_BOARD_SPECIFIC_LED 1
105 #define STATUS_LED_BLUE 0
106 #define STATUS_LED_RED 1
107 /* Blue */
108 #define STATUS_LED_BIT STATUS_LED_BLUE
109 #define STATUS_LED_STATE STATUS_LED_ON
110 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
111 /* Red */
112 #define STATUS_LED_BIT1 STATUS_LED_RED
113 #define STATUS_LED_STATE1 STATUS_LED_OFF
114 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
115 /* Optional value */
116 #define STATUS_LED_BOOT STATUS_LED_BIT
117
118 /* GPIO banks */
119 #ifdef CONFIG_STATUS_LED
120 #define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */
121 #define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */
122 #endif
123 #define CONFIG_OMAP3_GPIO_3 /* board revision */
124 #define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */
125
126 /* USB */
127 #define CONFIG_MUSB_UDC 1
128 #define CONFIG_USB_OMAP3 1
129 #define CONFIG_TWL4030_USB 1
130
131 /* USB device configuration */
132 #define CONFIG_USB_DEVICE 1
133 #define CONFIG_USB_TTY 1
134 /* Change these to suit your needs */
135 #define CONFIG_USBD_VENDORID 0x0451
136 #define CONFIG_USBD_PRODUCTID 0x5678
137 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
138 #define CONFIG_USBD_PRODUCT_NAME "Zoom2"
139
140 /* commands to include */
141 #include <config_cmd_default.h>
142
143 #define CONFIG_CMD_FAT /* FAT support */
144 #define CONFIG_CMD_I2C /* I2C serial bus support */
145 #define CONFIG_CMD_MMC /* MMC support */
146 #define CONFIG_CMD_NAND /* NAND support */
147 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
148
149 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
150 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
151 #undef CONFIG_CMD_IMI /* iminfo */
152 #undef CONFIG_CMD_IMLS /* List all found images */
153 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
154 #undef CONFIG_CMD_NFS /* NFS support */
155
156 #define CONFIG_SYS_NO_FLASH
157 #define CONFIG_HARD_I2C 1
158 #define CONFIG_SYS_I2C_SPEED 100000
159 #define CONFIG_SYS_I2C_SLAVE 1
160 #define CONFIG_SYS_I2C_BUS 0
161 #define CONFIG_SYS_I2C_BUS_SELECT 1
162 #define CONFIG_DRIVER_OMAP34XX_I2C 1
163
164 /*
165 * TWL4030
166 */
167 #define CONFIG_TWL4030_POWER 1
168 #define CONFIG_TWL4030_LED 1
169
170 /*
171 * Board NAND Info.
172 */
173 #define CONFIG_NAND_OMAP_GPMC
174 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
175 /* to access nand */
176 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
177 /* to access nand at */
178 /* CS0 */
179 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
180 #define CONFIG_SYS_MAX_NAND_DEVICE 1
181
182 /* Environment information */
183 #define CONFIG_BOOTDELAY 10
184
185 #define CONFIG_EXTRA_ENV_SETTINGS \
186 "usbtty=cdc_acm\0" \
187
188 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
189 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
190 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
191 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
192 CONFIG_SYS_INIT_RAM_SIZE - \
193 GENERATED_GBL_DATA_SIZE)
194 /*
195 * Miscellaneous configurable options
196 */
197
198 #define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # "
199 #define CONFIG_SYS_LONGHELP
200 #define CONFIG_SYS_CBSIZE 512
201 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
202 sizeof(CONFIG_SYS_PROMPT) + 16)
203 #define CONFIG_SYS_MAXARGS 16
204 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
205 /* Memtest from start of memory to 31MB */
206 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
207 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)
208 /* The default load address is the start of memory */
209 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
210 /* everything, incl board info, in Hz */
211 #undef CONFIG_SYS_CLKS_IN_HZ
212 /*
213 * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
214 * 32KHz clk, or from external sig. This rate is divided by a local divisor.
215 */
216 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
217 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
218 #define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
219
220 /*-----------------------------------------------------------------------
221 * Stack sizes
222 *
223 * The stack sizes are set up in start.S using these settings
224 */
225 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
226
227 /*-----------------------------------------------------------------------
228 * Physical Memory Map
229 */
230 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
231 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
232 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
233 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
234
235 /*-----------------------------------------------------------------------
236 * FLASH and environment organization
237 */
238
239 /* **** PISMO SUPPORT *** */
240
241 /* Configure the PISMO */
242 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
243 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
244
245 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
246
247 #if defined(CONFIG_CMD_NAND)
248 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
249 #endif
250
251 /* Monitor at start of flash */
252 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
253
254 #define CONFIG_ENV_IS_IN_NAND 1
255 #define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */
256
257 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
258 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
259 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
260
261 #define CONFIG_SYS_CACHELINE_SIZE 64
262
263 #endif /* __CONFIG_H */