include/configs/origen.h

   1 /*
   2  * Copyright (C) 2011 Samsung Electronics
   3  *
   4  * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 /* High Level Configuration Options */
  29 #define CONFIG_SAMSUNG                  1       /* SAMSUNG core */
  30 #define CONFIG_S5P                      1       /* S5P Family */
  31 #define CONFIG_EXYNOS4210               1       /* which is a EXYNOS4210 SoC */
  32 #define CONFIG_ORIGEN                   1       /* working with ORIGEN*/
  33
  34 #include <asm/arch/cpu.h>               /* get chip and board defs */
  35
  36 #define CONFIG_ARCH_CPU_INIT
  37 #define CONFIG_DISPLAY_CPUINFO
  38 #define CONFIG_DISPLAY_BOARDINFO
  39
  40 /* Keep L2 Cache Disabled */
  41 #define CONFIG_L2_OFF                   1
  42 #define CONFIG_SYS_DCACHE_OFF           1
  43
  44 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  45 #define CONFIG_SYS_TEXT_BASE            0x43E00000
  46
  47 /* input clock of PLL: ORIGEN has 24MHz input clock */
  48 #define CONFIG_SYS_CLK_FREQ             24000000
  49
  50 #define CONFIG_SETUP_MEMORY_TAGS
  51 #define CONFIG_CMDLINE_TAG
  52 #define CONFIG_INITRD_TAG
  53 #define CONFIG_CMDLINE_EDITING
  54
  55 /* MACH_TYPE_ORIGEN macro will be removed once added to mach-types */
  56 #define MACH_TYPE_ORIGEN                3455
  57 #define CONFIG_MACH_TYPE                MACH_TYPE_ORIGEN
  58
  59 /* Power Down Modes */
  60 #define S5P_CHECK_SLEEP                 0x00000BAD
  61 #define S5P_CHECK_DIDLE                 0xBAD00000
  62 #define S5P_CHECK_LPA                   0xABAD0000
  63
  64 /* Size of malloc() pool */
  65 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (1 << 20))
  66
  67 /* select serial console configuration */
  68 #define CONFIG_SERIAL_MULTI             1
  69 #define CONFIG_SERIAL2                  1       /* use SERIAL 2 */
  70 #define CONFIG_BAUDRATE                 115200
  71 #define EXYNOS4_DEFAULT_UART_OFFSET     0x020000
  72
  73 /* SD/MMC configuration */
  74 #define CONFIG_GENERIC_MMC              1
  75 #define CONFIG_MMC                      1
  76 #define CONFIG_S5P_MMC                  1
  77
  78 /* PWM */
  79 #define CONFIG_PWM                      1
  80
  81 /* allow to overwrite serial and ethaddr */
  82 #define CONFIG_ENV_OVERWRITE
  83
  84 /* Command definition*/
  85 #include <config_cmd_default.h>
  86
  87 #define CONFIG_CMD_PING
  88 #define CONFIG_CMD_ELF
  89 #define CONFIG_CMD_DHCP
  90 #define CONFIG_CMD_MMC
  91 #define CONFIG_CMD_FAT
  92 #undef CONFIG_CMD_NET
  93 #undef CONFIG_CMD_NFS
  94
  95 #define CONFIG_BOOTDELAY                3
  96 #define CONFIG_ZERO_BOOTDELAY_CHECK
  97 /* MMC SPL */
  98 #define CONFIG_SPL
  99 #define COPY_BL2_FNPTR_ADDR     0x02020030
 100
 101 #define CONFIG_BOOTCOMMAND      "fatload mmc 0 40007000 uImage; bootm 40007000"
 102
 103 /* Miscellaneous configurable options */
 104 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 105 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser    */
 106 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 107 #define CONFIG_SYS_PROMPT               "ORIGEN # "
 108 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size*/
 109 #define CONFIG_SYS_PBSIZE               384     /* Print Buffer Size */
 110 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 111 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
 112 /* Boot Argument Buffer Size */
 113 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 114 /* memtest works on */
 115 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 116 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x6000000)
 117 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 118
 119 #define CONFIG_SYS_HZ                   1000
 120
 121 /* valid baudrates */
 122 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 123
 124 /* Stack sizes */
 125 #define CONFIG_STACKSIZE                (256 << 10)     /* 256KB */
 126
 127 /* ORIGEN has 4 bank of DRAM */
 128 #define CONFIG_NR_DRAM_BANKS    4
 129 #define SDRAM_BANK_SIZE         (256UL << 20UL) /* 256 MB */
 130 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE
 131 #define PHYS_SDRAM_1_SIZE       SDRAM_BANK_SIZE
 132 #define PHYS_SDRAM_2            (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
 133 #define PHYS_SDRAM_2_SIZE       SDRAM_BANK_SIZE
 134 #define PHYS_SDRAM_3            (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
 135 #define PHYS_SDRAM_3_SIZE       SDRAM_BANK_SIZE
 136 #define PHYS_SDRAM_4            (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
 137 #define PHYS_SDRAM_4_SIZE       SDRAM_BANK_SIZE
 138
 139 /* FLASH and environment organization */
 140 #define CONFIG_SYS_NO_FLASH             1
 141 #undef CONFIG_CMD_IMLS
 142 #define CONFIG_IDENT_STRING             " for ORIGEN"
 143
 144 #ifdef CONFIG_USE_IRQ
 145 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
 146 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
 147 #endif
 148
 149 #define CONFIG_CLK_1000_400_200
 150
 151 /* MIU (Memory Interleaving Unit) */
 152 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
 153
 154 #define CONFIG_ENV_IS_IN_MMC            1
 155 #define CONFIG_SYS_MMC_ENV_DEV          0
 156 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KB */
 157 #define RESERVE_BLOCK_SIZE              (512)
 158 #define BL1_SIZE                        (16 << 10) /*16 K reserved for BL1*/
 159 #define CONFIG_ENV_OFFSET               (RESERVE_BLOCK_SIZE + BL1_SIZE)
 160 #define CONFIG_DOS_PARTITION            1
 161
 162 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
 163
 164 /* U-boot copy size from boot Media to DRAM.*/
 165 #define COPY_BL2_SIZE           0x80000
 166 #define BL2_START_OFFSET        ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
 167 #define BL2_SIZE_BLOC_COUNT     (COPY_BL2_SIZE/512)
 168
 169 /* Enable devicetree support */
 170 #define CONFIG_OF_LIBFDT
 171 #endif  /* __CONFIG_H */