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[people/ms/u-boot.git] / include / configs / origen.h
1 /*
2 * Copyright (C) 2011 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #ifndef __CONFIG_H
26 #define __CONFIG_H
27
28 /* High Level Configuration Options */
29 #define CONFIG_SAMSUNG 1 /* SAMSUNG core */
30 #define CONFIG_S5P 1 /* S5P Family */
31 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
32 #define CONFIG_ORIGEN 1 /* working with ORIGEN*/
33
34 #include <asm/arch/cpu.h> /* get chip and board defs */
35
36 #define CONFIG_ARCH_CPU_INIT
37 #define CONFIG_DISPLAY_CPUINFO
38 #define CONFIG_DISPLAY_BOARDINFO
39 #define CONFIG_BOARD_EARLY_INIT_F
40
41 /* Keep L2 Cache Disabled */
42 #define CONFIG_L2_OFF 1
43 #define CONFIG_SYS_DCACHE_OFF 1
44
45 #define CONFIG_SYS_SDRAM_BASE 0x40000000
46 #define CONFIG_SYS_TEXT_BASE 0x43E00000
47
48 /* input clock of PLL: ORIGEN has 24MHz input clock */
49 #define CONFIG_SYS_CLK_FREQ 24000000
50
51 #define CONFIG_SETUP_MEMORY_TAGS
52 #define CONFIG_CMDLINE_TAG
53 #define CONFIG_INITRD_TAG
54 #define CONFIG_CMDLINE_EDITING
55
56 #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
57
58 /* Power Down Modes */
59 #define S5P_CHECK_SLEEP 0x00000BAD
60 #define S5P_CHECK_DIDLE 0xBAD00000
61 #define S5P_CHECK_LPA 0xABAD0000
62
63 /* Size of malloc() pool */
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
65
66 /* select serial console configuration */
67 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */
68 #define CONFIG_BAUDRATE 115200
69 #define EXYNOS4_DEFAULT_UART_OFFSET 0x020000
70
71 #define CONFIG_SKIP_LOWLEVEL_INIT
72
73 /* SD/MMC configuration */
74 #define CONFIG_GENERIC_MMC
75 #define CONFIG_MMC
76 #define CONFIG_SDHCI
77 #define CONFIG_S5P_SDHCI
78
79 /* PWM */
80 #define CONFIG_PWM 1
81
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84
85 /* Command definition*/
86 #include <config_cmd_default.h>
87
88 #undef CONFIG_CMD_PING
89 #define CONFIG_CMD_ELF
90 #define CONFIG_CMD_DHCP
91 #define CONFIG_CMD_MMC
92 #define CONFIG_CMD_FAT
93 #undef CONFIG_CMD_NET
94 #undef CONFIG_CMD_NFS
95
96 #define CONFIG_BOOTDELAY 3
97 #define CONFIG_ZERO_BOOTDELAY_CHECK
98 /* MMC SPL */
99 #define CONFIG_SPL
100 #define COPY_BL2_FNPTR_ADDR 0x02020030
101
102 #define CONFIG_SPL_TEXT_BASE 0x02021410
103
104 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
105
106 /* Miscellaneous configurable options */
107 #define CONFIG_SYS_LONGHELP /* undef to save memory */
108 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
109 #define CONFIG_SYS_PROMPT "ORIGEN # "
110 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
111 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
112 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
113 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
114 /* Boot Argument Buffer Size */
115 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
116 /* memtest works on */
117 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
118 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
119 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
120
121 #define CONFIG_SYS_HZ 1000
122
123 /* ORIGEN has 4 bank of DRAM */
124 #define CONFIG_NR_DRAM_BANKS 4
125 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
126 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
127 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
128 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
129 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
130 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
131 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
132 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
133 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
134
135 /* FLASH and environment organization */
136 #define CONFIG_SYS_NO_FLASH 1
137 #undef CONFIG_CMD_IMLS
138 #define CONFIG_IDENT_STRING " for ORIGEN"
139
140 #define CONFIG_CLK_1000_400_200
141
142 /* MIU (Memory Interleaving Unit) */
143 #define CONFIG_MIU_2BIT_21_7_INTERLEAVED
144
145 #define CONFIG_ENV_IS_IN_MMC 1
146 #define CONFIG_SYS_MMC_ENV_DEV 0
147 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
148 #define RESERVE_BLOCK_SIZE (512)
149 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
150 #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
151 #define CONFIG_DOS_PARTITION 1
152
153 #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
154 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
155
156 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000
157
158 /* U-boot copy size from boot Media to DRAM.*/
159 #define COPY_BL2_SIZE 0x80000
160 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
161 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
162
163 /* Enable devicetree support */
164 #define CONFIG_OF_LIBFDT
165
166 #endif /* __CONFIG_H */