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1 /*
2 * (C) Copyright 2010-2011
3 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
4 * esd electronic system design gmbh <www.esd.eu>
5 *
6 * (C) Copyright 2007-2008
7 * Stelian Pop <stelian@popies.net>
8 * Lead Tech Design <www.leadtechdesign.com>
9 *
10 * Configuation settings for the esd OTC570 board.
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22 #include <asm/hardware.h>
23
24 /*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
30 #define CONFIG_SYS_TEXT_BASE 0x20002000
31
32 /*
33 * since a number of boards are not being listed in linux
34 * arch/arm/tools/mach-types any more, the mach-types have to be
35 * defined here
36 */
37 #define MACH_TYPE_OTC570 2166
38
39 /* ARM asynchronous clock */
40 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
41 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
42 #define CONFIG_SYS_HZ 1000 /* decrementer freq */
43
44 /* Misc CPU related */
45 #define CONFIG_SKIP_LOWLEVEL_INIT
46 #define CONFIG_ARCH_CPU_INIT
47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_SERIAL_TAG
51 #define CONFIG_REVISION_TAG
52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */
54
55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
56 #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
57 #define CONFIG_PREBOOT /* enable preboot variable */
58
59 /*
60 * Hardware drivers
61 */
62
63 /* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
64 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
65
66 /* general purpose I/O */
67 #define CONFIG_AT91_GPIO
68
69 /* Console output */
70 #define CONFIG_ATMEL_USART
71 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
72 #define CONFIG_USART_ID ATMEL_ID_SYS
73 #define CONFIG_BAUDRATE 115200
74
75 #define CONFIG_BOOTDELAY 3
76 #define CONFIG_ZERO_BOOTDELAY_CHECK
77
78 /* LCD */
79 #define CONFIG_LCD
80 #undef CONFIG_SPLASH_SCREEN
81
82 #ifdef CONFIG_LCD
83 # define LCD_BPP LCD_COLOR8
84
85 # ifndef CONFIG_SPLASH_SCREEN
86 # define CONFIG_LCD_LOGO
87 # define CONFIG_LCD_INFO
88 # undef CONFIG_LCD_INFO_BELOW_LOGO
89 # endif /* CONFIG_SPLASH_SCREEN */
90
91 # undef LCD_TEST_PATTERN
92 # define CONFIG_SYS_WHITE_ON_BLACK
93 # define CONFIG_ATMEL_LCD
94 # define CONFIG_SYS_CONSOLE_IS_IN_ENV
95 # define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
96 # define CONFIG_CMD_BMP
97 #endif /* CONFIG_LCD */
98
99 /* RTC and I2C stuff */
100 #define CONFIG_RTC_DS1338
101 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
102 #undef CONFIG_HARD_I2C
103 #define CONFIG_SOFT_I2C
104 #define CONFIG_SYS_I2C_SPEED 100000
105 #define CONFIG_SYS_I2C_SLAVE 0x7F
106
107 #ifdef CONFIG_SOFT_I2C
108 # define CONFIG_I2C_CMD_TREE
109 # define CONFIG_I2C_MULTI_BUS
110 /* Configure data and clock pins for pio */
111 # define I2C_INIT { \
112 at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
113 at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
114 }
115 # define I2C_SOFT_DECLARATIONS
116 /* Configure data pin as output */
117 # define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
118 /* Configure data pin as input */
119 # define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
120 /* Read data pin */
121 # define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
122 /* Set data pin */
123 # define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
124 /* Set clock pin */
125 # define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
126 # define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
127 #endif /* CONFIG_SOFT_I2C */
128
129 /*
130 * BOOTP options
131 */
132 #define CONFIG_BOOTP_BOOTFILESIZE
133 #define CONFIG_BOOTP_BOOTPATH
134 #define CONFIG_BOOTP_GATEWAY
135 #define CONFIG_BOOTP_HOSTNAME
136
137 /*
138 * Command line configuration.
139 */
140 #include <config_cmd_default.h>
141 #undef CONFIG_CMD_FPGA
142 #undef CONFIG_CMD_LOADS
143 #undef CONFIG_CMD_IMLS
144
145 #define CONFIG_CMD_PING
146 #define CONFIG_CMD_DHCP
147 #define CONFIG_CMD_NAND
148 #define CONFIG_CMD_USB
149 #define CONFIG_CMD_I2C
150 #define CONFIG_CMD_DATE
151
152 /* LED */
153 #define CONFIG_AT91_LED
154
155 /*
156 * SDRAM: 1 bank, min 32, max 128 MB
157 * Initialized before u-boot gets started.
158 */
159 #define CONFIG_NR_DRAM_BANKS 1
160 #define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
161 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
162
163 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
164 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
165 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
166
167 /*
168 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
169 * leaving the correct space for initial global data structure above
170 * that address while providing maximum stack area below.
171 */
172 #define CONFIG_SYS_INIT_SP_ADDR \
173 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
174
175 /* DataFlash */
176 #ifdef CONFIG_SYS_USE_DATAFLASH
177 # define CONFIG_ATMEL_DATAFLASH_SPI
178 # define CONFIG_HAS_DATAFLASH
179 # define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
180 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
181 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
182 # define AT91_SPI_CLK 15000000
183 # define DATAFLASH_TCSS (0x1a << 16)
184 # define DATAFLASH_TCHS (0x1 << 24)
185 #endif
186
187 /* NOR flash is not populated, disable it */
188 #define CONFIG_SYS_NO_FLASH
189
190 /* NAND flash */
191 #ifdef CONFIG_CMD_NAND
192 # define CONFIG_NAND_ATMEL
193 # define CONFIG_SYS_MAX_NAND_DEVICE 1
194 # define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
195 # define CONFIG_SYS_NAND_DBW_8
196 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
197 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
198 # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
199 # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
200 #endif
201
202 /* Ethernet */
203 #define CONFIG_MACB
204 #define CONFIG_RMII
205 #define CONFIG_FIT
206 #define CONFIG_NET_RETRY_COUNT 20
207 #undef CONFIG_RESET_PHY_R
208
209 /* USB */
210 #define CONFIG_USB_ATMEL
211 #define CONFIG_USB_OHCI_NEW
212 #define CONFIG_DOS_PARTITION
213 #define CONFIG_SYS_USB_OHCI_CPU_INIT
214 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
215 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
216 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
217 #define CONFIG_USB_STORAGE
218 #define CONFIG_CMD_FAT
219
220 /* CAN */
221 #define CONFIG_AT91_CAN
222
223 /* hw-controller addresses */
224 #define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
225
226 #ifdef CONFIG_SYS_USE_DATAFLASH
227
228 /* bootstrap + u-boot + env in dataflash on CS0 */
229 # define CONFIG_ENV_IS_IN_DATAFLASH
230 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
231 0x8400)
232 # define CONFIG_ENV_OFFSET 0x4200
233 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
234 CONFIG_ENV_OFFSET)
235 # define CONFIG_ENV_SIZE 0x4200
236
237 #elif CONFIG_SYS_USE_NANDFLASH
238
239 /* bootstrap + u-boot + env + linux in nandflash */
240 # define CONFIG_ENV_IS_IN_NAND 1
241 # define CONFIG_ENV_OFFSET 0xC0000
242 # define CONFIG_ENV_SIZE 0x20000
243
244 #endif
245
246 #define CONFIG_SYS_PROMPT "=> "
247 #define CONFIG_SYS_CBSIZE 512
248 #define CONFIG_SYS_MAXARGS 16
249 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
250 sizeof(CONFIG_SYS_PROMPT) + 16)
251 #define CONFIG_SYS_LONGHELP
252 #define CONFIG_CMDLINE_EDITING
253
254 /*
255 * Size of malloc() pool
256 */
257 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
258 128*1024, 0x1000)
259
260 #endif