]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/palmld.h
Move defaults from config_cmd_default.h to Kconfig
[people/ms/u-boot.git] / include / configs / palmld.h
1 /*
2 * Palm LifeDrive configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 /*
13 * High Level Board Configuration Options
14 */
15 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
16 #define CONFIG_PALMLD 1 /* Palm LifeDrive board */
17
18 /* we will never enable dcache, because we have to setup MMU first */
19 #define CONFIG_SYS_DCACHE_OFF
20
21 /*
22 * Environment settings
23 */
24 #define CONFIG_ENV_OVERWRITE
25 #define CONFIG_SYS_MALLOC_LEN (128*1024)
26 #define CONFIG_SYS_TEXT_BASE 0x0
27
28 #define CONFIG_BOOTCOMMAND \
29 "if mmcinfo && fatload mmc 0 0xa0000000 uboot.script ; then " \
30 "source 0xa0000000; " \
31 "else " \
32 "bootm 0x0x60000; " \
33 "fi; "
34 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,9600"
35 #define CONFIG_TIMESTAMP
36 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
37 #define CONFIG_CMDLINE_TAG
38 #define CONFIG_SETUP_MEMORY_TAGS
39
40 #define CONFIG_LZMA /* LZMA compression support */
41
42 /*
43 * Serial Console Configuration
44 */
45 #define CONFIG_PXA_SERIAL
46 #define CONFIG_FFUART 1
47 #define CONFIG_CONS_INDEX 3
48 #define CONFIG_BAUDRATE 9600
49
50 /*
51 * Bootloader Components Configuration
52 */
53 #define CONFIG_CMD_ENV
54 #define CONFIG_CMD_MMC
55 #define CONFIG_CMD_IDE
56 #define CONFIG_LCD
57 #define CONFIG_PXA_LCD
58
59 /*
60 * MMC Card Configuration
61 */
62 #ifdef CONFIG_CMD_MMC
63 #define CONFIG_MMC
64 #define CONFIG_GENERIC_MMC
65 #define CONFIG_PXA_MMC_GENERIC
66 #define CONFIG_SYS_MMC_BASE 0xF0000000
67 #define CONFIG_CMD_FAT
68 #define CONFIG_CMD_EXT2
69 #define CONFIG_DOS_PARTITION
70 #endif
71
72 /*
73 * LCD
74 */
75 #ifdef CONFIG_LCD
76 #define CONFIG_LQ038J7DH53
77 #define CONFIG_VIDEO_LOGO
78 #define CONFIG_CMD_BMP
79 #define CONFIG_SPLASH_SCREEN
80 #define CONFIG_SPLASH_SCREEN_ALIGN
81 #define CONFIG_VIDEO_BMP_GZIP
82 #define CONFIG_VIDEO_BMP_RLE8
83 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
84 #endif
85
86 /*
87 * KGDB
88 */
89 #ifdef CONFIG_CMD_KGDB
90 #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
91 #endif
92
93 /*
94 * HUSH Shell Configuration
95 */
96 #define CONFIG_SYS_HUSH_PARSER 1
97
98 #define CONFIG_SYS_LONGHELP
99 #ifdef CONFIG_SYS_HUSH_PARSER
100 #define CONFIG_SYS_PROMPT "$ "
101 #endif
102 #define CONFIG_SYS_CBSIZE 256
103 #define CONFIG_SYS_PBSIZE \
104 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
105 #define CONFIG_SYS_MAXARGS 16
106 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
107 #define CONFIG_SYS_DEVICE_NULLDEV 1
108
109 /*
110 * Clock Configuration
111 */
112 #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
113
114 /*
115 * DRAM Map
116 */
117 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
118 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
119 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
120
121 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
122 #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
123
124 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
125 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
126
127 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
128
129 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
130 #define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
131
132 /*
133 * NOR FLASH
134 */
135 #ifdef CONFIG_CMD_FLASH
136 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
137 #define PHYS_FLASH_SIZE 0x00080000 /* 512 KB */
138 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
139
140 #define CONFIG_SYS_FLASH_CFI
141 #define CONFIG_FLASH_CFI_DRIVER 1
142
143 #define CONFIG_FLASH_CFI_LEGACY
144 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
145
146 #define CONFIG_SYS_MONITOR_BASE 0
147 #define CONFIG_SYS_MONITOR_LEN 0x40000
148
149 #define CONFIG_SYS_MAX_FLASH_BANKS 1
150 #define CONFIG_SYS_MAX_FLASH_SECT 256
151
152 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
153
154 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000
155 #define CONFIG_SYS_FLASH_WRITE_TOUT 240000
156 #define CONFIG_SYS_FLASH_LOCK_TOUT 240000
157 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
158 #define CONFIG_SYS_FLASH_PROTECTION
159
160 #define CONFIG_ENV_IS_IN_FLASH 1
161 #define CONFIG_ENV_SECT_SIZE 0x10000
162 #else
163 #define CONFIG_SYS_NO_FLASH
164 #define CONFIG_ENV_IS_NOWHERE
165 #endif
166
167 #define CONFIG_ENV_ADDR 0x40000
168 #define CONFIG_ENV_SIZE 0x4000
169
170 /*
171 * IDE
172 */
173 #ifdef CONFIG_CMD_IDE
174 #define CONFIG_LBA48
175 #undef CONFIG_IDE_LED
176 #undef CONFIG_IDE_RESET
177
178 #define __io
179
180 #define CONFIG_SYS_IDE_MAXBUS 1
181 #define CONFIG_SYS_IDE_MAXDEVICE 1
182
183 #define CONFIG_SYS_ATA_BASE_ADDR 0x20000000
184 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
185
186 #define CONFIG_SYS_ATA_DATA_OFFSET 0x10
187 #define CONFIG_SYS_ATA_REG_OFFSET 0x10
188 #define CONFIG_SYS_ATA_ALT_OFFSET 0x10
189
190 #define CONFIG_SYS_ATA_STRIDE 1
191 #endif
192
193 /*
194 * GPIO settings
195 */
196 #define CONFIG_SYS_GAFR0_L_VAL 0x00000000
197 #define CONFIG_SYS_GAFR0_U_VAL 0xa5180012
198 #define CONFIG_SYS_GAFR1_L_VAL 0x69988056
199 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa580aa
200 #define CONFIG_SYS_GAFR2_L_VAL 0x6aaaaaaa
201 #define CONFIG_SYS_GAFR2_U_VAL 0x01040001
202 #define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
203 #define CONFIG_SYS_GAFR3_U_VAL 0x00000009
204 #define CONFIG_SYS_GPCR0_VAL 0x00000000
205 #define CONFIG_SYS_GPCR1_VAL 0x00000000
206 #define CONFIG_SYS_GPCR2_VAL 0x00000000
207 #define CONFIG_SYS_GPCR3_VAL 0x00000000
208 #define CONFIG_SYS_GPDR0_VAL 0xc26b0000
209 #define CONFIG_SYS_GPDR1_VAL 0xfcdfaa93
210 #define CONFIG_SYS_GPDR2_VAL 0x7bbaffff
211 #define CONFIG_SYS_GPDR3_VAL 0x006ff38d
212 #define CONFIG_SYS_GPSR0_VAL 0x0d9e45ee
213 #define CONFIG_SYS_GPSR1_VAL 0x03affdae
214 #define CONFIG_SYS_GPSR2_VAL 0x07554000
215 #define CONFIG_SYS_GPSR3_VAL 0x01bc0785
216
217 #define CONFIG_SYS_PSSR_VAL 0x30
218
219 /*
220 * Clock settings
221 */
222 #define CONFIG_SYS_CKEN 0x01ffffff
223 #define CONFIG_SYS_CCCR 0x02000210
224
225 /*
226 * Memory settings
227 */
228 #define CONFIG_SYS_MSC0_VAL 0x7ff844c8
229 #define CONFIG_SYS_MSC1_VAL 0x7ff86ab4
230 #define CONFIG_SYS_MSC2_VAL 0x7ff87ff8
231 #define CONFIG_SYS_MDCNFG_VAL 0x0B880acd
232 #define CONFIG_SYS_MDREFR_VAL 0x201fa031
233 #define CONFIG_SYS_MDMRS_VAL 0x00320032
234 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000
235 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
236
237 /*
238 * PCMCIA and CF Interfaces
239 */
240 #define CONFIG_SYS_MECR_VAL 0x00000003
241 #define CONFIG_SYS_MCMEM0_VAL 0x0001c391
242 #define CONFIG_SYS_MCMEM1_VAL 0x0001c391
243 #define CONFIG_SYS_MCATT0_VAL 0x0001c391
244 #define CONFIG_SYS_MCATT1_VAL 0x0001c391
245 #define CONFIG_SYS_MCIO0_VAL 0x00014611
246 #define CONFIG_SYS_MCIO1_VAL 0x0001c391
247
248 #endif /* __CONFIG_H */