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1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_VF610
15
16 #define CONFIG_SYS_THUMB_BUILD
17
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 #define CONFIG_BOARD_EARLY_INIT_F
27
28 /* Allow to overwrite serial and ethaddr */
29 #define CONFIG_ENV_OVERWRITE
30 #define CONFIG_BAUDRATE 115200
31
32 /* NAND support */
33 #define CONFIG_CMD_NAND
34 #define CONFIG_CMD_NAND_TRIMFFS
35 #define CONFIG_SYS_NAND_ONFI_DETECTION
36
37 #ifdef CONFIG_CMD_NAND
38 #define CONFIG_USE_ARCH_MEMCPY
39 #define CONFIG_SYS_MAX_NAND_DEVICE 1
40 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
41
42 #define CONFIG_JFFS2_NAND
43
44 /* UBI */
45 #define CONFIG_CMD_UBIFS
46 #define CONFIG_RBTREE
47 #define CONFIG_LZO
48
49 /* Dynamic MTD partition support */
50 #define CONFIG_CMD_MTDPARTS
51 #define CONFIG_MTD_PARTITIONS
52 #define CONFIG_MTD_DEVICE
53
54 #ifndef MTDIDS_DEFAULT
55 #define MTDIDS_DEFAULT "nand0=NAND"
56 #endif
57
58 #ifndef MTDPARTS_DEFAULT
59 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
60 ",128k(env1)"\
61 ",128k(env2)"\
62 ",128k(dtb)"\
63 ",6144k(kernel)"\
64 ",-(root)"
65 #endif
66
67 #endif
68
69 #define CONFIG_MMC
70 #define CONFIG_FSL_ESDHC
71 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
72 #define CONFIG_SYS_FSL_ESDHC_NUM 1
73
74 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
75 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
76 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
77 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
78
79 #define CONFIG_GENERIC_MMC
80 #define CONFIG_DOS_PARTITION
81
82 #define CONFIG_FEC_MXC
83 #define CONFIG_MII
84 #define IMX_FEC_BASE ENET_BASE_ADDR
85 #define CONFIG_FEC_XCV_TYPE RMII
86 #define CONFIG_FEC_MXC_PHYADDR 0
87 #define CONFIG_PHYLIB
88 #define CONFIG_PHY_MICREL
89
90 /* QSPI Configs*/
91
92 #ifdef CONFIG_FSL_QSPI
93 #define FSL_QSPI_FLASH_SIZE (1 << 24)
94 #define FSL_QSPI_FLASH_NUM 2
95 #define CONFIG_SYS_FSL_QSPI_LE
96 #endif
97
98 /* I2C Configs */
99 #define CONFIG_SYS_I2C
100 #define CONFIG_SYS_I2C_MXC_I2C3
101 #define CONFIG_SYS_I2C_MXC
102
103 /* RTC (actually an RV-4162 but M41T62-compatible) */
104 #define CONFIG_CMD_DATE
105 #define CONFIG_RTC_M41T62
106 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
107 #define CONFIG_SYS_RTC_BUS_NUM 2
108
109 /* EEPROM (24FC256) */
110 #define CONFIG_CMD_EEPROM
111 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
112 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
113 #define CONFIG_SYS_I2C_EEPROM_BUS 2
114
115
116 #define CONFIG_LOADADDR 0x82000000
117
118 /* We boot from the gfxRAM area of the OCRAM. */
119 #define CONFIG_SYS_TEXT_BASE 0x3f408000
120 #define CONFIG_BOARD_SIZE_LIMIT 524288
121
122 /* if no target-specific extra environment settings were defined by the
123 target, define an empty one */
124 #ifndef PCM052_EXTRA_ENV_SETTINGS
125 #define PCM052_EXTRA_ENV_SETTINGS
126 #endif
127
128 /* if no target-specific boot command was defined by the target,
129 define an empty one */
130 #ifndef PCM052_BOOTCOMMAND
131 #define PCM052_BOOTCOMMAND
132 #endif
133
134 /* if no target-specific extra environment settings were defined by the
135 target, define an empty one */
136 #ifndef PCM052_NET_INIT
137 #define PCM052_NET_INIT
138 #endif
139
140 /* boot command, including the target-defined one if any */
141 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
142
143 /* Extra env settings (including the target-defined ones if any) */
144 #define CONFIG_EXTRA_ENV_SETTINGS \
145 PCM052_EXTRA_ENV_SETTINGS \
146 "autoload=no\0" \
147 "fdt_high=0xffffffff\0" \
148 "initrd_high=0xffffffff\0" \
149 "blimg_file=u-boot.vyb\0" \
150 "blimg_addr=0x81000000\0" \
151 "kernel_file=zImage\0" \
152 "kernel_addr=0x82000000\0" \
153 "fdt_file=zImage.dtb\0" \
154 "fdt_addr=0x81000000\0" \
155 "ram_file=uRamdisk\0" \
156 "ram_addr=0x83000000\0" \
157 "filesys=rootfs.ubifs\0" \
158 "sys_addr=0x81000000\0" \
159 "tftploc=/path/to/tftp/directory/\0" \
160 "nfs_root=/path/to/nfs/root\0" \
161 "tftptimeout=1000\0" \
162 "tftptimeoutcountmax=1000000\0" \
163 "mtdparts=" MTDPARTS_DEFAULT "\0" \
164 "bootargs_base=setenv bootargs rw " \
165 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
166 "console=ttyLP1,115200n8\0" \
167 "bootargs_sd=setenv bootargs ${bootargs} " \
168 "root=/dev/mmcblk0p2 rootwait\0" \
169 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
170 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
171 "bootargs_nand=setenv bootargs ${bootargs} " \
172 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
173 "bootargs_ram=setenv bootargs ${bootargs} " \
174 "root=/dev/ram rw initrd=${ram_addr}\0" \
175 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
176 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
177 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
178 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
179 "bootz ${kernel_addr} - ${fdt_addr}\0" \
180 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
181 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
182 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
183 "bootz ${kernel_addr} - ${fdt_addr}\0" \
184 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
185 "nand read ${fdt_addr} dtb; " \
186 "nand read ${kernel_addr} kernel; " \
187 "bootz ${kernel_addr} - ${fdt_addr}\0" \
188 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
189 "nand read ${fdt_addr} dtb; " \
190 "nand read ${kernel_addr} kernel; " \
191 "nand read ${ram_addr} root; " \
192 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
193 "update_bootloader_from_tftp=" PCM052_NET_INIT \
194 "if tftp ${blimg_addr} "\
195 "${tftpdir}${blimg_file}; then " \
196 "mtdparts default; " \
197 "nand erase.part bootloader; " \
198 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
199 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
200 "${kernel_file}; " \
201 "then mtdparts default; " \
202 "nand erase.part kernel; " \
203 "nand write ${kernel_addr} kernel ${filesize}; " \
204 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
205 "nand erase.part dtb; " \
206 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
207 "update_kernel_from_tftp=" PCM052_NET_INIT \
208 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
209 "then setenv fdtsize ${filesize}; " \
210 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
211 "mtdparts default; " \
212 "nand erase.part dtb; " \
213 "nand write ${fdt_addr} dtb ${fdtsize}; " \
214 "nand erase.part kernel; " \
215 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
216 "update_rootfs_from_tftp=" PCM052_NET_INIT \
217 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
218 "then mtdparts default; " \
219 "nand erase.part root; " \
220 "ubi part root; " \
221 "ubi create rootfs; " \
222 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
223 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
224 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
225 "then mtdparts default; " \
226 "nand erase.part root; " \
227 "nand write ${ram_addr} root ${filesize}; fi\0"
228
229 /* Miscellaneous configurable options */
230 #define CONFIG_SYS_LONGHELP /* undef to save memory */
231 #define CONFIG_AUTO_COMPLETE
232 #define CONFIG_CMDLINE_EDITING
233 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
234 #define CONFIG_SYS_PBSIZE \
235 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
236 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
237 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
238
239 #define CONFIG_SYS_MEMTEST_START 0x80010000
240 #define CONFIG_SYS_MEMTEST_END 0x87C00000
241
242 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
243
244 /*
245 * Stack sizes
246 * The stack sizes are set up in start.S using the settings below
247 */
248 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
249
250 /* Physical memory map */
251 #define CONFIG_NR_DRAM_BANKS 1
252 #define PHYS_SDRAM (0x80000000)
253 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
254
255 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
256 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
257 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
258
259 #define CONFIG_SYS_INIT_SP_OFFSET \
260 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
261 #define CONFIG_SYS_INIT_SP_ADDR \
262 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
263
264 /* FLASH and environment organization */
265 #define CONFIG_SYS_NO_FLASH
266
267 #ifdef CONFIG_ENV_IS_IN_MMC
268 #define CONFIG_ENV_SIZE (8 * 1024)
269
270 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
271 #define CONFIG_SYS_MMC_ENV_DEV 0
272 #endif
273
274 #ifdef CONFIG_ENV_IS_IN_NAND
275 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
276 #define CONFIG_ENV_SIZE (8 * 1024)
277 #define CONFIG_ENV_OFFSET 0xA0000
278 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
279 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
280 #endif
281
282 #endif