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1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_VF610
15
16 #define CONFIG_SYS_THUMB_BUILD
17
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 /* Allow to overwrite serial and ethaddr */
27 #define CONFIG_ENV_OVERWRITE
28 #define CONFIG_BAUDRATE 115200
29
30 /* NAND support */
31 #define CONFIG_CMD_NAND
32 #define CONFIG_CMD_NAND_TRIMFFS
33 #define CONFIG_SYS_NAND_ONFI_DETECTION
34
35 #ifdef CONFIG_CMD_NAND
36 #define CONFIG_SYS_MAX_NAND_DEVICE 1
37 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
38
39 #define CONFIG_JFFS2_NAND
40
41 /* UBI */
42 #define CONFIG_CMD_UBIFS
43 #define CONFIG_RBTREE
44 #define CONFIG_LZO
45
46 /* Dynamic MTD partition support */
47 #define CONFIG_CMD_MTDPARTS
48 #define CONFIG_MTD_PARTITIONS
49 #define CONFIG_MTD_DEVICE
50
51 #ifndef MTDIDS_DEFAULT
52 #define MTDIDS_DEFAULT "nand0=NAND"
53 #endif
54
55 #ifndef MTDPARTS_DEFAULT
56 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
57 ",128k(env1)"\
58 ",128k(env2)"\
59 ",128k(dtb)"\
60 ",6144k(kernel)"\
61 ",-(root)"
62 #endif
63
64 #endif
65
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
68 #define CONFIG_SYS_FSL_ESDHC_NUM 1
69
70 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
71
72 #define CONFIG_GENERIC_MMC
73 #define CONFIG_DOS_PARTITION
74
75 #define CONFIG_FEC_MXC
76 #define CONFIG_MII
77 #define IMX_FEC_BASE ENET_BASE_ADDR
78 #define CONFIG_FEC_XCV_TYPE RMII
79 #define CONFIG_FEC_MXC_PHYADDR 0
80 #define CONFIG_PHYLIB
81 #define CONFIG_PHY_MICREL
82
83 /* QSPI Configs*/
84
85 #ifdef CONFIG_FSL_QSPI
86 #define FSL_QSPI_FLASH_SIZE (1 << 24)
87 #define FSL_QSPI_FLASH_NUM 2
88 #define CONFIG_SYS_FSL_QSPI_LE
89 #endif
90
91 /* I2C Configs */
92 #define CONFIG_SYS_I2C
93 #define CONFIG_SYS_I2C_MXC_I2C3
94 #define CONFIG_SYS_I2C_MXC
95
96 /* RTC (actually an RV-4162 but M41T62-compatible) */
97 #define CONFIG_CMD_DATE
98 #define CONFIG_RTC_M41T62
99 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
100 #define CONFIG_SYS_RTC_BUS_NUM 2
101
102 /* EEPROM (24FC256) */
103 #define CONFIG_CMD_EEPROM
104 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
105 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
106 #define CONFIG_SYS_I2C_EEPROM_BUS 2
107
108
109 #define CONFIG_LOADADDR 0x82000000
110
111 /* We boot from the gfxRAM area of the OCRAM. */
112 #define CONFIG_SYS_TEXT_BASE 0x3f408000
113 #define CONFIG_BOARD_SIZE_LIMIT 524288
114
115 /* if no target-specific extra environment settings were defined by the
116 target, define an empty one */
117 #ifndef PCM052_EXTRA_ENV_SETTINGS
118 #define PCM052_EXTRA_ENV_SETTINGS
119 #endif
120
121 /* if no target-specific boot command was defined by the target,
122 define an empty one */
123 #ifndef PCM052_BOOTCOMMAND
124 #define PCM052_BOOTCOMMAND
125 #endif
126
127 /* if no target-specific extra environment settings were defined by the
128 target, define an empty one */
129 #ifndef PCM052_NET_INIT
130 #define PCM052_NET_INIT
131 #endif
132
133 /* boot command, including the target-defined one if any */
134 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
135
136 /* Extra env settings (including the target-defined ones if any) */
137 #define CONFIG_EXTRA_ENV_SETTINGS \
138 PCM052_EXTRA_ENV_SETTINGS \
139 "autoload=no\0" \
140 "fdt_high=0xffffffff\0" \
141 "initrd_high=0xffffffff\0" \
142 "blimg_file=u-boot.vyb\0" \
143 "blimg_addr=0x81000000\0" \
144 "kernel_file=zImage\0" \
145 "kernel_addr=0x82000000\0" \
146 "fdt_file=zImage.dtb\0" \
147 "fdt_addr=0x81000000\0" \
148 "ram_file=uRamdisk\0" \
149 "ram_addr=0x83000000\0" \
150 "filesys=rootfs.ubifs\0" \
151 "sys_addr=0x81000000\0" \
152 "tftploc=/path/to/tftp/directory/\0" \
153 "nfs_root=/path/to/nfs/root\0" \
154 "tftptimeout=1000\0" \
155 "tftptimeoutcountmax=1000000\0" \
156 "mtdparts=" MTDPARTS_DEFAULT "\0" \
157 "bootargs_base=setenv bootargs rw " \
158 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
159 "console=ttyLP1,115200n8\0" \
160 "bootargs_sd=setenv bootargs ${bootargs} " \
161 "root=/dev/mmcblk0p2 rootwait\0" \
162 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
163 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
164 "bootargs_nand=setenv bootargs ${bootargs} " \
165 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
166 "bootargs_ram=setenv bootargs ${bootargs} " \
167 "root=/dev/ram rw initrd=${ram_addr}\0" \
168 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
169 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
170 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
171 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
172 "bootz ${kernel_addr} - ${fdt_addr}\0" \
173 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
174 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
175 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
176 "bootz ${kernel_addr} - ${fdt_addr}\0" \
177 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
178 "nand read ${fdt_addr} dtb; " \
179 "nand read ${kernel_addr} kernel; " \
180 "bootz ${kernel_addr} - ${fdt_addr}\0" \
181 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
182 "nand read ${fdt_addr} dtb; " \
183 "nand read ${kernel_addr} kernel; " \
184 "nand read ${ram_addr} root; " \
185 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
186 "update_bootloader_from_tftp=" PCM052_NET_INIT \
187 "if tftp ${blimg_addr} "\
188 "${tftpdir}${blimg_file}; then " \
189 "mtdparts default; " \
190 "nand erase.part bootloader; " \
191 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
192 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
193 "${kernel_file}; " \
194 "then mtdparts default; " \
195 "nand erase.part kernel; " \
196 "nand write ${kernel_addr} kernel ${filesize}; " \
197 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
198 "nand erase.part dtb; " \
199 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
200 "update_kernel_from_tftp=" PCM052_NET_INIT \
201 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
202 "then setenv fdtsize ${filesize}; " \
203 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
204 "mtdparts default; " \
205 "nand erase.part dtb; " \
206 "nand write ${fdt_addr} dtb ${fdtsize}; " \
207 "nand erase.part kernel; " \
208 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
209 "update_rootfs_from_tftp=" PCM052_NET_INIT \
210 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
211 "then mtdparts default; " \
212 "nand erase.part root; " \
213 "ubi part root; " \
214 "ubi create rootfs; " \
215 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
216 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
217 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
218 "then mtdparts default; " \
219 "nand erase.part root; " \
220 "nand write ${ram_addr} root ${filesize}; fi\0"
221
222 /* Miscellaneous configurable options */
223 #define CONFIG_SYS_LONGHELP /* undef to save memory */
224 #define CONFIG_AUTO_COMPLETE
225 #define CONFIG_CMDLINE_EDITING
226 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
227 #define CONFIG_SYS_PBSIZE \
228 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
229 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
230 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
231
232 #define CONFIG_SYS_MEMTEST_START 0x80010000
233 #define CONFIG_SYS_MEMTEST_END 0x87C00000
234
235 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
236
237 /*
238 * Stack sizes
239 * The stack sizes are set up in start.S using the settings below
240 */
241 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
242
243 /* Physical memory map */
244 #define CONFIG_NR_DRAM_BANKS 1
245 #define PHYS_SDRAM (0x80000000)
246 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
247
248 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
249 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
250 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
251
252 #define CONFIG_SYS_INIT_SP_OFFSET \
253 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
254 #define CONFIG_SYS_INIT_SP_ADDR \
255 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
256
257 /* FLASH and environment organization */
258 #define CONFIG_SYS_NO_FLASH
259
260 #ifdef CONFIG_ENV_IS_IN_MMC
261 #define CONFIG_ENV_SIZE (8 * 1024)
262
263 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
264 #define CONFIG_SYS_MMC_ENV_DEV 0
265 #endif
266
267 #ifdef CONFIG_ENV_IS_IN_NAND
268 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
269 #define CONFIG_ENV_SIZE (8 * 1024)
270 #define CONFIG_ENV_OFFSET 0xA0000
271 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
272 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
273 #endif
274
275 #endif