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1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_VF610
15
16 #define CONFIG_SYS_THUMB_BUILD
17
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 /* Allow to overwrite serial and ethaddr */
27 #define CONFIG_ENV_OVERWRITE
28 #define CONFIG_BAUDRATE 115200
29
30 /* NAND support */
31 #define CONFIG_CMD_NAND
32 #define CONFIG_CMD_NAND_TRIMFFS
33 #define CONFIG_SYS_NAND_ONFI_DETECTION
34
35 #ifdef CONFIG_CMD_NAND
36 #define CONFIG_SYS_MAX_NAND_DEVICE 1
37 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
38
39 #define CONFIG_JFFS2_NAND
40
41 /* UBI */
42 #define CONFIG_CMD_UBIFS
43 #define CONFIG_RBTREE
44 #define CONFIG_LZO
45
46 /* Dynamic MTD partition support */
47 #define CONFIG_CMD_MTDPARTS
48 #define CONFIG_MTD_PARTITIONS
49 #define CONFIG_MTD_DEVICE
50
51 #ifndef MTDIDS_DEFAULT
52 #define MTDIDS_DEFAULT "nand0=NAND"
53 #endif
54
55 #ifndef MTDPARTS_DEFAULT
56 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\
57 ",128k(env1)"\
58 ",128k(env2)"\
59 ",128k(dtb)"\
60 ",6144k(kernel)"\
61 ",-(root)"
62 #endif
63
64 #endif
65
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
68 #define CONFIG_SYS_FSL_ESDHC_NUM 1
69
70 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
71
72 #define CONFIG_FEC_MXC
73 #define CONFIG_MII
74 #define IMX_FEC_BASE ENET_BASE_ADDR
75 #define CONFIG_FEC_XCV_TYPE RMII
76 #define CONFIG_FEC_MXC_PHYADDR 0
77 #define CONFIG_PHYLIB
78 #define CONFIG_PHY_MICREL
79
80 /* QSPI Configs*/
81
82 #ifdef CONFIG_FSL_QSPI
83 #define FSL_QSPI_FLASH_SIZE (1 << 24)
84 #define FSL_QSPI_FLASH_NUM 2
85 #define CONFIG_SYS_FSL_QSPI_LE
86 #endif
87
88 /* I2C Configs */
89 #define CONFIG_SYS_I2C
90 #define CONFIG_SYS_I2C_MXC_I2C3
91 #define CONFIG_SYS_I2C_MXC
92
93 /* RTC (actually an RV-4162 but M41T62-compatible) */
94 #define CONFIG_CMD_DATE
95 #define CONFIG_RTC_M41T62
96 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
97 #define CONFIG_SYS_RTC_BUS_NUM 2
98
99 /* EEPROM (24FC256) */
100 #define CONFIG_CMD_EEPROM
101 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
102 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
103 #define CONFIG_SYS_I2C_EEPROM_BUS 2
104
105
106 #define CONFIG_LOADADDR 0x82000000
107
108 /* We boot from the gfxRAM area of the OCRAM. */
109 #define CONFIG_SYS_TEXT_BASE 0x3f408000
110 #define CONFIG_BOARD_SIZE_LIMIT 524288
111
112 /* if no target-specific extra environment settings were defined by the
113 target, define an empty one */
114 #ifndef PCM052_EXTRA_ENV_SETTINGS
115 #define PCM052_EXTRA_ENV_SETTINGS
116 #endif
117
118 /* if no target-specific boot command was defined by the target,
119 define an empty one */
120 #ifndef PCM052_BOOTCOMMAND
121 #define PCM052_BOOTCOMMAND
122 #endif
123
124 /* if no target-specific extra environment settings were defined by the
125 target, define an empty one */
126 #ifndef PCM052_NET_INIT
127 #define PCM052_NET_INIT
128 #endif
129
130 /* boot command, including the target-defined one if any */
131 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand"
132
133 /* Extra env settings (including the target-defined ones if any) */
134 #define CONFIG_EXTRA_ENV_SETTINGS \
135 PCM052_EXTRA_ENV_SETTINGS \
136 "autoload=no\0" \
137 "fdt_high=0xffffffff\0" \
138 "initrd_high=0xffffffff\0" \
139 "blimg_file=u-boot.vyb\0" \
140 "blimg_addr=0x81000000\0" \
141 "kernel_file=zImage\0" \
142 "kernel_addr=0x82000000\0" \
143 "fdt_file=zImage.dtb\0" \
144 "fdt_addr=0x81000000\0" \
145 "ram_file=uRamdisk\0" \
146 "ram_addr=0x83000000\0" \
147 "filesys=rootfs.ubifs\0" \
148 "sys_addr=0x81000000\0" \
149 "tftploc=/path/to/tftp/directory/\0" \
150 "nfs_root=/path/to/nfs/root\0" \
151 "tftptimeout=1000\0" \
152 "tftptimeoutcountmax=1000000\0" \
153 "mtdparts=" MTDPARTS_DEFAULT "\0" \
154 "bootargs_base=setenv bootargs rw " \
155 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
156 "console=ttyLP1,115200n8\0" \
157 "bootargs_sd=setenv bootargs ${bootargs} " \
158 "root=/dev/mmcblk0p2 rootwait\0" \
159 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
160 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
161 "bootargs_nand=setenv bootargs ${bootargs} " \
162 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
163 "bootargs_ram=setenv bootargs ${bootargs} " \
164 "root=/dev/ram rw initrd=${ram_addr}\0" \
165 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
166 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
167 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
168 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
169 "bootz ${kernel_addr} - ${fdt_addr}\0" \
170 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
171 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
172 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
173 "bootz ${kernel_addr} - ${fdt_addr}\0" \
174 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
175 "nand read ${fdt_addr} dtb; " \
176 "nand read ${kernel_addr} kernel; " \
177 "bootz ${kernel_addr} - ${fdt_addr}\0" \
178 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
179 "nand read ${fdt_addr} dtb; " \
180 "nand read ${kernel_addr} kernel; " \
181 "nand read ${ram_addr} root; " \
182 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
183 "update_bootloader_from_tftp=" PCM052_NET_INIT \
184 "if tftp ${blimg_addr} "\
185 "${tftpdir}${blimg_file}; then " \
186 "mtdparts default; " \
187 "nand erase.part bootloader; " \
188 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
189 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
190 "${kernel_file}; " \
191 "then mtdparts default; " \
192 "nand erase.part kernel; " \
193 "nand write ${kernel_addr} kernel ${filesize}; " \
194 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
195 "nand erase.part dtb; " \
196 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
197 "update_kernel_from_tftp=" PCM052_NET_INIT \
198 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
199 "then setenv fdtsize ${filesize}; " \
200 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
201 "mtdparts default; " \
202 "nand erase.part dtb; " \
203 "nand write ${fdt_addr} dtb ${fdtsize}; " \
204 "nand erase.part kernel; " \
205 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
206 "update_rootfs_from_tftp=" PCM052_NET_INIT \
207 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
208 "then mtdparts default; " \
209 "nand erase.part root; " \
210 "ubi part root; " \
211 "ubi create rootfs; " \
212 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
213 "update_ramdisk_from_tftp=" PCM052_NET_INIT \
214 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
215 "then mtdparts default; " \
216 "nand erase.part root; " \
217 "nand write ${ram_addr} root ${filesize}; fi\0"
218
219 /* Miscellaneous configurable options */
220 #define CONFIG_SYS_LONGHELP /* undef to save memory */
221 #define CONFIG_AUTO_COMPLETE
222 #define CONFIG_CMDLINE_EDITING
223 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
224 #define CONFIG_SYS_PBSIZE \
225 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
226 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
227 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
228
229 #define CONFIG_SYS_MEMTEST_START 0x80010000
230 #define CONFIG_SYS_MEMTEST_END 0x87C00000
231
232 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
233
234 /*
235 * Stack sizes
236 * The stack sizes are set up in start.S using the settings below
237 */
238 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
239
240 /* Physical memory map */
241 #define CONFIG_NR_DRAM_BANKS 1
242 #define PHYS_SDRAM (0x80000000)
243 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
244
245 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
246 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
247 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
248
249 #define CONFIG_SYS_INIT_SP_OFFSET \
250 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
251 #define CONFIG_SYS_INIT_SP_ADDR \
252 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
253
254 /* FLASH and environment organization */
255 #define CONFIG_SYS_NO_FLASH
256
257 #ifdef CONFIG_ENV_IS_IN_MMC
258 #define CONFIG_ENV_SIZE (8 * 1024)
259
260 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
261 #define CONFIG_SYS_MMC_ENV_DEV 0
262 #endif
263
264 #ifdef CONFIG_ENV_IS_IN_NAND
265 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
266 #define CONFIG_ENV_SIZE (8 * 1024)
267 #define CONFIG_ENV_OFFSET 0xA0000
268 #define CONFIG_ENV_SIZE_REDUND (8 * 1024)
269 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
270 #endif
271
272 #endif