include/configs/pcm058.h

   1 /*
   2  * Copyright (C) Stefano Babic <sbabic@denx.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7
   8 #ifndef __PCM058_CONFIG_H
   9 #define __PCM058_CONFIG_H
  10
  11 #include <config_distro_defaults.h>
  12
  13 #ifdef CONFIG_SPL
  14 #define CONFIG_SPL_SPI_LOAD
  15 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
  16 #include "imx6_spl.h"
  17 #endif
  18
  19 #include "mx6_common.h"
  20
  21 /* Thermal */
  22 #define CONFIG_IMX_THERMAL
  23
  24 /* Serial */
  25 #define CONFIG_MXC_UART
  26 #define CONFIG_MXC_UART_BASE           UART2_BASE
  27 #define CONSOLE_DEV             "ttymxc1"
  28
  29 #define PHYS_SDRAM_SIZE         (1u * 1024 * 1024 * 1024)
  30
  31 /* Early setup */
  32 #define CONFIG_DISPLAY_BOARDINFO_LATE
  33
  34
  35 /* Size of malloc() pool */
  36 #define CONFIG_SYS_MALLOC_LEN           (8 * SZ_1M)
  37
  38 /* Ethernet */
  39 #define CONFIG_FEC_MXC
  40 #define CONFIG_MII
  41 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  42 #define CONFIG_FEC_XCV_TYPE             RGMII
  43 #define CONFIG_ETHPRIME                 "FEC"
  44 #define CONFIG_FEC_MXC_PHYADDR          3
  45
  46 #define CONFIG_PHYLIB
  47 #define CONFIG_PHY_MICREL
  48 #define CONFIG_PHY_KSZ9031
  49
  50 /* SPI Flash */
  51 #define CONFIG_MXC_SPI
  52 #define CONFIG_SF_DEFAULT_BUS           0
  53 #define CONFIG_SF_DEFAULT_CS            0
  54 #define CONFIG_SF_DEFAULT_SPEED         20000000
  55 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
  56
  57 /* I2C Configs */
  58 #define CONFIG_SYS_I2C
  59 #define CONFIG_SYS_I2C_MXC
  60 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 2 */
  61 #define CONFIG_SYS_I2C_SPEED              100000
  62
  63 #ifndef CONFIG_SPL_BUILD
  64 #define CONFIG_CMD_NAND
  65 /* Enable NAND support */
  66 #define CONFIG_CMD_NAND_TRIMFFS
  67 #define CONFIG_NAND_MXS
  68 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  69 #define CONFIG_SYS_NAND_BASE            0x40000000
  70 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  71 #define CONFIG_SYS_NAND_ONFI_DETECTION
  72 #endif
  73
  74 /* DMA stuff, needed for GPMI/MXS NAND support */
  75 #define CONFIG_APBH_DMA
  76 #define CONFIG_APBH_DMA_BURST
  77 #define CONFIG_APBH_DMA_BURST8
  78
  79 /* Filesystem support */
  80 #define CONFIG_MTD_PARTITIONS
  81 #define CONFIG_MTD_DEVICE
  82 #define MTDIDS_DEFAULT    "nand0=nand"
  83 #define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
  84
  85 /* Physical Memory Map */
  86 #define CONFIG_NR_DRAM_BANKS           1
  87 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
  88
  89 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
  90 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
  91 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
  92
  93 #define CONFIG_SYS_INIT_SP_OFFSET \
  94         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  95 #define CONFIG_SYS_INIT_SP_ADDR \
  96         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  97
  98 /* MMC Configs */
  99 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 100 #define CONFIG_SYS_FSL_USDHC_NUM        1
 101
 102 /* Environment organization */
 103 #define CONFIG_ENV_IS_IN_SPI_FLASH
 104 #define CONFIG_ENV_SIZE                (16 * 1024)
 105 #define CONFIG_ENV_OFFSET               (1024 * SZ_1K)
 106 #define CONFIG_ENV_SECT_SIZE            (64 * SZ_1K)
 107 #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
 108 #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
 109 #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 110 #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 111 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 112 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
 113                                                 CONFIG_ENV_SECT_SIZE)
 114 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
 115
 116 #ifdef CONFIG_ENV_IS_IN_NAND
 117 #define CONFIG_ENV_OFFSET              (0x1E0000)
 118 #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
 119 #endif
 120
 121 #endif