]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/picosam9g45.h
Merge git://git.denx.de/u-boot-mmc
[people/ms/u-boot.git] / include / configs / picosam9g45.h
1 /*
2 * Configuration settings for the mini-box PICOSAM9G45 board.
3 * (C) Copyright 2015 Inter Act B.V.
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9m10g45ek.h
7 * (C) Copyright 2007-2008
8 * Stelian Pop <stelian@popies.net>
9 * Lead Tech Design <www.leadtechdesign.com>
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 #include <asm/hardware.h>
18
19 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
20
21 /* ARM asynchronous clock */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
23 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
24
25 #define CONFIG_PICOSAM
26
27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31
32 /* general purpose I/O */
33 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
34 #define CONFIG_AT91_GPIO
35 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
36
37 /* serial console */
38 #define CONFIG_ATMEL_USART
39 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
40 #define CONFIG_USART_ID ATMEL_ID_SYS
41
42 /* LCD */
43 #define LCD_BPP LCD_COLOR8
44 #define CONFIG_LCD_LOGO
45 #undef LCD_TEST_PATTERN
46 #define CONFIG_LCD_INFO
47 #define CONFIG_LCD_INFO_BELOW_LOGO
48 #define CONFIG_ATMEL_LCD
49 #define CONFIG_ATMEL_LCD_RGB565
50 /* board specific(not enough SRAM) */
51 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000
52
53 /* LED */
54 #define CONFIG_AT91_LED
55 #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */
56
57
58 /*
59 * BOOTP options
60 */
61 #define CONFIG_BOOTP_BOOTFILESIZE
62
63 /* Enable the watchdog */
64 #define CONFIG_AT91SAM9_WATCHDOG
65 #define CONFIG_HW_WATCHDOG
66
67 /*
68 * Command line configuration.
69 */
70
71 /* SDRAM */
72 #define CONFIG_NR_DRAM_BANKS 2
73 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */
74 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
75 #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */
76 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
77 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
78
79 #define CONFIG_SYS_INIT_SP_ADDR \
80 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
81
82 /* MMC */
83
84 #ifdef CONFIG_CMD_MMC
85 #define CONFIG_GENERIC_ATMEL_MCI
86 #endif
87
88 /* Ethernet */
89 #define CONFIG_MACB
90 #define CONFIG_RMII
91 #define CONFIG_NET_RETRY_COUNT 20
92 #define CONFIG_RESET_PHY_R
93 #define CONFIG_AT91_WANTS_COMMON_PHY
94
95 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
96
97 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
98 #define CONFIG_SYS_MEMTEST_END 0x23e00000
99
100 #ifdef CONFIG_SYS_USE_MMC
101 /* bootstrap + u-boot + env + linux in mmc */
102 #define CONFIG_ENV_SIZE 0x4000
103
104 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
105 "fatload mmc 0:1 0x22000000 zImage; " \
106 "bootz 0x22000000 - 0x21000000"
107 #endif
108
109 /*
110 * Size of malloc() pool
111 */
112 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
113
114 /* Defines for SPL */
115 #define CONFIG_SPL_TEXT_BASE 0x300000
116 #define CONFIG_SPL_MAX_SIZE 0x010000
117 #define CONFIG_SPL_STACK 0x310000
118
119 #define CONFIG_SYS_MONITOR_LEN 0x80000
120
121 #ifdef CONFIG_SYS_USE_MMC
122
123 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
124 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
125 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
126 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
127
128 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
129 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
130
131 #define CONFIG_SPL_ATMEL_SIZE
132 #define CONFIG_SYS_MASTER_CLOCK 132096000
133 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
134 #define CONFIG_SYS_MCKR 0x1301
135 #define CONFIG_SYS_MCKR_CSS 0x1302
136
137 #endif
138 #endif