include/configs/ppmc7xx.h

   1 /*
   2  * ppmc7xx.h
   3  * ---------
   4  *
   5  * Wind River PPMC 7xx/74xx board configuration file.
   6  *
   7  * By Richard Danter (richard.danter@windriver.com)
   8  * Copyright (C) 2005 Wind River Systems
   9  */
  10
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 #define CONFIG_PPMC7XX
  16
  17
  18 /*===================================================================
  19  *
  20  * User configurable settings - Modify to your preference
  21  *
  22  *===================================================================
  23  */
  24
  25 /*
  26  * Debug
  27  *
  28  * DEBUG                        - Define this is you want extra debug info
  29  * GTREGREAD                    - Required to build with debug
  30  * do_bdinfo                    - Required to build with debug
  31  */
  32
  33 #undef  DEBUG
  34 #define GTREGREAD(x)                    0xFFFFFFFF
  35 #define do_bdinfo(a,b,c,d)
  36
  37
  38 /*
  39  * CPU type
  40  *
  41  * CONFIG_7xx                   - We have a 750 or 755 CPU
  42  * CONFIG_74xx                  - We have a 7400 CPU
  43  * CONFIG_ALTIVEC               - We have altivec enabled CPU (only 7400)
  44  * CONFIG_BUS_CLK               - System bus clock in Hz
  45  */
  46
  47 #define CONFIG_7xx
  48 #undef  CONFIG_74xx
  49 #undef  CONFIG_ALTIVEC
  50 #define CONFIG_BUS_CLK                  66000000
  51
  52
  53 /*
  54  * Monitor configuration
  55  *
  56  * CONFIG_COMMANDS              - List of command sets to include in shell
  57  *
  58  * The following command sets have been tested and known to work:
  59  *
  60  * CFG_CMD_CACHE                - Cache control commands
  61  * CFG_CMD_MEMORY               - Memory display, change and test commands
  62  * CFG_CMD_FLASH                - Erase and program flash
  63  * CFG_CMD_ENV                  - Environment commands
  64  * CFG_CMD_RUN                  - Run commands stored in env vars
  65  * CFG_CMD_ELF                  - Load ELF files
  66  * CFG_CMD_NET                  - Networking/file download commands
  67  * CFG_CMD_PING                 - ICMP Echo Request command
  68  * CFG_CMD_PCI                  - PCI Bus scanning command
  69  */
  70
  71 #define CONFIG_COMMANDS         ( (CFG_CMD_DFL & ~(CFG_CMD_KGDB)) |     \
  72                                                    CFG_CMD_FLASH |      \
  73                                                    CFG_CMD_ENV |        \
  74                                                    CFG_CMD_RUN |        \
  75                                                    CFG_CMD_ELF |        \
  76                                                    CFG_CMD_NET |        \
  77                                                    CFG_CMD_PING |       \
  78                                                    CFG_CMD_PCI)
  79
  80
  81 /*
  82  * Serial configuration
  83  *
  84  * CONFIG_CONS_INDEX            - Serial console port number (COM1)
  85  * CONFIG_BAUDRATE                      - Serial speed
  86  */
  87
  88 #define CONFIG_CONS_INDEX               1
  89 #define CONFIG_BAUDRATE                 9600
  90
  91
  92 /*
  93  * PCI config
  94  *
  95  * CONFIG_PCI                           - Enable PCI bus
  96  * CONFIG_PCI_PNP                       - Enable Plug & Play support
  97  * CONFIG_PCI_SCAN_SHOW         - Enable display of devices at startup
  98  */
  99
 100 #define CONFIG_PCI
 101 #define CONFIG_PCI_PNP
 102 #undef  CONFIG_PCI_SCAN_SHOW
 103
 104
 105 /*
 106  * Network config
 107  *
 108  * CONFIG_NET_MULTI                     - Support for multiple network interfaces
 109  * CONFIG_EEPRO100                      - Intel 8255x Ethernet Controller
 110  * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
 111  */
 112
 113 #define CONFIG_NET_MULTI
 114 #define CONFIG_EEPRO100
 115 #define CONFIG_EEPRO100_SROM_WRITE
 116
 117
 118 /*
 119  * Enable extra init functions
 120  *
 121  * CONFIG_MISC_INIT_F           - Call pre-relocation init functions
 122  * CONFIG_MISC_INIT_R           - Call post relocation init functions
 123  */
 124
 125 #undef  CONFIG_MISC_INIT_F
 126 #define CONFIG_MISC_INIT_R
 127
 128
 129 /*
 130  * Boot config
 131  *
 132  * CONFIG_BOOTCOMMAND           - Command(s) to execute to auto-boot
 133  * CONFIG_BOOTDELAY                     - How long to wait before auto-boot (in sec)
 134  */
 135
 136 #define CONFIG_BOOTCOMMAND              \
 137         "bootp;" \
 138         "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
 139         "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
 140         "bootm"
 141 #define CONFIG_BOOTDELAY                5
 142
 143
 144 /*===================================================================
 145  *
 146  * Board configuration settings - You should not need to modify these
 147  *
 148  *===================================================================
 149  */
 150
 151
 152 #include <cmd_confdefs.h>
 153
 154
 155 /*
 156  * Memory map
 157  *
 158  * This board runs in a standard CHRP (Map-B) configuration.
 159  *
 160  *      Type            Start           End                     Size    Width   Chip Sel
 161  *      ----------- ----------- ----------- ------- ------- --------
 162  *      SDRAM           0x00000000      0x04000000      64MB    64b             SDRAMCS0
 163  *      User LED's      0x78000000                                              RCS3
 164  *      UART            0x7C000000                                              RCS2
 165  *      Mailbox         0xFF000000                                              RCS1
 166  *      Flash           0xFFC00000      0xFFFFFFFF      4MB     64b             RCS0
 167  *
 168  * Flash sectors are laid out as follows.
 169  *
 170  *      Sector  Start           End                     Size    Comments
 171  *      ------- ----------- ----------- ------- -----------
 172  *       0              0xFFC00000      0xFFC3FFFF      256KB
 173  *   1          0xFFC40000      0xFFC7FFFF      256KB
 174  *       2              0xFFC80000      0xFFCBFFFF      256KB
 175  *       3              0xFFCC0000      0xFFCFFFFF      256KB
 176  *       4              0xFFD00000      0xFFD3FFFF      256KB
 177  *       5              0xFFD40000      0xFFD7FFFF      256KB
 178  *       6              0xFFD80000      0xFFDBFFFF      256KB
 179  *       7              0xFFDC0000      0xFFDFFFFF      256KB
 180  *   8          0xFFE00000      0xFFE3FFFF      256KB
 181  *       9              0xFFE40000      0xFFE7FFFF      256KB
 182  *  10          0xFFE80000      0xFFEBFFFF      256KB
 183  *  11          0xFFEC0000      0xFFEFFFFF      256KB
 184  *  12          0xFFF00000      0xFFF3FFFF      256KB   U-Boot code here
 185  *  13          0xFFF40000      0xFFF7FFFF      256KB
 186  *  14          0xFFF80000      0xFFFBFFFF      256KB
 187  *  15          0xFFFC0000      0xFFFDFFFF      128KB
 188  *  16          0xFFFE0000      0xFFFE7FFF       32KB   U-Boot env vars here
 189  *  17          0xFFFE8000      0xFFFEFFFF       32KB   U-Boot backup copy of env vars here
 190  *  18          0xFFFF0000      0xFFFFFFFF       64KB
 191  */
 192
 193
 194 /*
 195  * SDRAM config - see memory map details above.
 196  *
 197  * CFG_SDRAM_BASE                       - Start address of SDRAM, this _must_ be zero!
 198  * CFG_SDRAM_SIZE                       - Total size of contiguous SDRAM bank(s)
 199  */
 200
 201 #define CFG_SDRAM_BASE                  0x00000000
 202 #define CFG_SDRAM_SIZE                  0x04000000
 203
 204
 205 /*
 206  * Flash config - see memory map details above.
 207  *
 208  * CFG_FLASH_BASE                       - Start address of flash memory
 209  * CFG_FLASH_SIZE                       - Total size of contiguous flash mem
 210  * CFG_FLASH_ERASE_TOUT         - Erase timeout in ms
 211  * CFG_FLASH_WRITE_TOUT         - Write timeout in ms
 212  * CFG_MAX_FLASH_BANKS          - Number of banks of flash on board
 213  * CFG_MAX_FLASH_SECT           - Number of sectors in a bank
 214  */
 215
 216 #define CFG_FLASH_BASE                  0xFFC00000
 217 #define CFG_FLASH_SIZE                  0x00400000
 218 #define CFG_FLASH_ERASE_TOUT    250000
 219 #define CFG_FLASH_WRITE_TOUT    5000
 220 #define CFG_MAX_FLASH_BANKS             1
 221 #define CFG_MAX_FLASH_SECT              19
 222
 223
 224 /*
 225  * Monitor config - see memory map details above
 226  *
 227  * CFG_MONITOR_BASE                     - Base address of monitor code
 228  * CFG_MALLOC_LEN                       - Size of malloc pool (128KB)
 229  */
 230
 231 #define CFG_MONITOR_BASE                TEXT_BASE
 232 #define CFG_MALLOC_LEN                  0x20000
 233
 234
 235 /*
 236  * Command shell settings
 237  *
 238  * CFG_BARGSIZE                 - Boot Argument buffer size
 239  * CFG_BOOTMAPSZ                - Size of app's mapped RAM at boot (Linux=8MB)
 240  * CFG_CBSIZE                   - Console Buffer (input) size
 241  * CFG_LOAD_ADDR                - Default load address
 242  * CFG_LONGHELP                 - Provide more detailed help
 243  * CFG_MAXARGS                  - Number of args accepted by monitor commands
 244  * CFG_MEMTEST_START            - Start address of test to run on RAM
 245  * CFG_MEMTEST_END              - End address of RAM test
 246  * CFG_PBSIZE                   - Print Buffer (output) size
 247  * CFG_PROMPT                   - Prompt string
 248  */
 249
 250 #define CFG_BARGSIZE                    1024
 251 #define CFG_BOOTMAPSZ                   0x800000
 252 #define CFG_CBSIZE                      1024
 253 #define CFG_LOAD_ADDR                   0x100000
 254 #define CFG_LONGHELP
 255 #define CFG_MAXARGS                     16
 256 #define CFG_MEMTEST_START               0x00040000
 257 #define CFG_MEMTEST_END                 0x00040100
 258 #define CFG_PBSIZE                      1024
 259 #define CFG_PROMPT                      "=> "
 260
 261
 262 /*
 263  * Environment config - see memory map details above
 264  *
 265  * CFG_ENV_IS_IN_FLASH          - The env variables are stored in flash
 266  * CFG_ENV_ADDR                 - Address of the sector containing env vars
 267  * CFG_ENV_SIZE                 - Ammount of RAM for env vars (used to save RAM, 4KB)
 268  * CFG_ENV_SECT_SIZE            - Size of sector containing env vars (32KB)
 269  */
 270
 271 #define CFG_ENV_IS_IN_FLASH             1
 272 #define CFG_ENV_ADDR                    0xFFFE0000
 273 #define CFG_ENV_SIZE                    0x1000
 274 #define CFG_ENV_ADDR_REDUND             0xFFFE8000
 275 #define CFG_ENV_SIZE_REDUND             0x1000
 276 #define CFG_ENV_SECT_SIZE               0x8000
 277
 278
 279 /*
 280  * Initial RAM config
 281  *
 282  * Since the main system RAM is initialised very early, we place the INIT_RAM
 283  * in the main system RAM just above the exception vectors. The contents are
 284  * copied to top of RAM by the init code.
 285  *
 286  * CFG_INIT_RAM_ADDR            - Address of Init RAM, above exception vect
 287  * CFG_INIT_RAM_END                     - Size of Init RAM
 288  * CFG_GBL_DATA_SIZE            - Ammount of RAM to reserve for global data
 289  * CFG_GBL_DATA_OFFSET          - Start of global data, top of stack
 290  */
 291
 292 #define CFG_INIT_RAM_ADDR               (CFG_SDRAM_BASE + 0x4000)
 293 #define CFG_INIT_RAM_END                0x4000
 294 #define CFG_GBL_DATA_SIZE               128
 295 #define CFG_GBL_DATA_OFFSET             (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 296
 297
 298 /*
 299  * Initial BAT config
 300  *
 301  * BAT0 - System SDRAM
 302  * BAT1 - LED's and Serial Port
 303  * BAT2 - PCI Memory
 304  * BAT3 - PCI I/O including Flash Memory
 305  */
 306
 307 #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
 308 #define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
 309 #define CFG_DBAT0L CFG_IBAT0L
 310 #define CFG_DBAT0U CFG_IBAT0U
 311
 312 #define CFG_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
 313 #define CFG_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 314 #define CFG_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 315 #define CFG_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 316
 317 #define CFG_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
 318 #define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 319 #define CFG_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 320 #define CFG_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 321
 322 #define CFG_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
 323 #define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 324 #define CFG_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 325 #define CFG_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 326
 327
 328 /*
 329  * Cache config
 330  *
 331  * CFG_CACHELINE_SIZE           - Size of a cache line (CPU specific)
 332  * CFG_L2                                       - L2 cache enabled if defined
 333  * L2_INIT                                      - L2 cache init flags
 334  * L2_ENABLE                            - L2 cache enable flags
 335  */
 336
 337 #define CFG_CACHELINE_SIZE              32
 338 #undef  CFG_L2
 339 #define L2_INIT                                 0
 340 #define L2_ENABLE                               0
 341
 342
 343 /*
 344  * Clocks config
 345  *
 346  * CFG_BUS_HZ                           - Bus clock frequency in Hz
 347  * CFG_BUS_CLK                          - As above (?)
 348  * CFG_HZ                                       - Decrementer freq in Hz
 349  */
 350
 351 #define CFG_BUS_HZ                              CONFIG_BUS_CLK
 352 #define CFG_BUS_CLK                             CONFIG_BUS_CLK
 353 #define CFG_HZ                                  1000
 354
 355
 356 /*
 357  * Serial port config
 358  *
 359  * CFG_BAUDRATE_TABLE           - List of valid baud rates
 360  * CFG_NS16550                          - Include the NS16550 driver
 361  * CFG_NS16550_SERIAL           - Include the serial (wrapper) driver
 362  * CFG_NS16550_CLK                      - Frequency of reference clock
 363  * CFG_NS16550_REG_SIZE         - 64-bit accesses to 8-bit port
 364  * CFG_NS16550_COM1                     - Base address of 1st serial port
 365  */
 366
 367 #define CFG_BAUDRATE_TABLE              { 9600, 19200, 38400, 57600, 115200 }
 368 #define CFG_NS16550
 369 #define CFG_NS16550_SERIAL
 370 #define CFG_NS16550_CLK                 3686400
 371 #define CFG_NS16550_REG_SIZE    -8
 372 #define CFG_NS16550_COM1                0x7C000000
 373
 374
 375 /*
 376  * PCI Config - Address Map B (CHRP)
 377  */
 378
 379 #define CFG_PCI_MEMORY_BUS      0x00000000
 380 #define CFG_PCI_MEMORY_PHYS     0x00000000
 381 #define CFG_PCI_MEMORY_SIZE     0x40000000
 382 #define CFG_PCI_MEM_BUS         0x80000000
 383 #define CFG_PCI_MEM_PHYS        0x80000000
 384 #define CFG_PCI_MEM_SIZE        0x7D000000
 385 #define CFG_ISA_MEM_BUS         0x00000000
 386 #define CFG_ISA_MEM_PHYS        0xFD000000
 387 #define CFG_ISA_MEM_SIZE        0x01000000
 388 #define CFG_PCI_IO_BUS          0x00800000
 389 #define CFG_PCI_IO_PHYS         0xFE800000
 390 #define CFG_PCI_IO_SIZE         0x00400000
 391 #define CFG_ISA_IO_BUS          0x00000000
 392 #define CFG_ISA_IO_PHYS         0xFE000000
 393 #define CFG_ISA_IO_SIZE         0x00800000
 394 #define CFG_ISA_IO_BASE_ADDRESS CFG_ISA_IO_PHYS
 395 #define CFG_ISA_IO              CFG_ISA_IO_PHYS
 396 #define CFG_60X_PCI_IO_OFFSET   CFG_ISA_IO_PHYS
 397
 398
 399 /*
 400  * Extra init functions
 401  *
 402  * CFG_BOARD_ASM_INIT           - Call assembly init code
 403  */
 404
 405 #define CFG_BOARD_ASM_INIT
 406
 407
 408 /*
 409  * Boot flags
 410  *
 411  * BOOTFLAG_COLD                        - Indicates a power-on boot
 412  * BOOTFLAG_WARM                        - Indicates a software reset
 413  */
 414
 415 #define BOOTFLAG_COLD                   0x01
 416 #define BOOTFLAG_WARM                   0x02
 417
 418
 419 #endif /* __CONFIG_H */