include/configs/r0p7734.h

   1 /*
   2  * Configuation settings for the Renesas Solutions r0p7734 board
   3  *
   4  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __R0P7734_H
  10 #define __R0P7734_H
  11
  12 #define CONFIG_CPU_SH7734       1
  13 #define CONFIG_R0P7734          1
  14 #define CONFIG_400MHZ_MODE      1
  15 /* #define CONFIG_533MHZ_MODE   1 */
  16
  17 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
  18
  19 #define CONFIG_CMD_SDRAM
  20
  21 #define CONFIG_BOOTARGS         "console=ttySC3,115200"
  22
  23 #define CONFIG_DISPLAY_BOARDINFO
  24 #undef  CONFIG_SHOW_BOOT_PROGRESS
  25
  26 /* Ether */
  27 #define CONFIG_SH_ETHER 1
  28 #define CONFIG_SH_ETHER_USE_PORT (0)
  29 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
  30 #define CONFIG_PHY_SMSC 1
  31 #define CONFIG_BITBANGMII
  32 #define CONFIG_BITBANGMII_MULTI
  33 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
  34 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
  35 #ifndef CONFIG_SH_ETHER
  36 # define CONFIG_SMC911X
  37 # define CONFIG_SMC911X_16_BIT
  38 # define CONFIG_SMC911X_BASE (0x84000000)
  39 #endif
  40
  41 /* undef to save memory */
  42 #define CONFIG_SYS_LONGHELP
  43 /* Monitor Command Prompt */
  44 /* Buffer size for input from the Console */
  45 #define CONFIG_SYS_CBSIZE               256
  46 /* Buffer size for Console output */
  47 #define CONFIG_SYS_PBSIZE               256
  48 /* max args accepted for monitor commands */
  49 #define CONFIG_SYS_MAXARGS              16
  50 /* Buffer size for Boot Arguments passed to kernel */
  51 #define CONFIG_SYS_BARGSIZE     512
  52 /* List of legal baudrate settings for this board */
  53 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  54
  55 /* SCIF */
  56 #define CONFIG_SCIF                     1
  57 #define CONFIG_CONS_SCIF3       1
  58
  59 /* Suppress display of console information at boot */
  60
  61 /* SDRAM */
  62 #define CONFIG_SYS_SDRAM_BASE   (0x88000000)
  63 #define CONFIG_SYS_SDRAM_SIZE   (128 * 1024 * 1024)
  64 #define CONFIG_SYS_LOAD_ADDR    (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  65
  66 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  67 #define CONFIG_SYS_MEMTEST_END   (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
  68 /* Enable alternate, more extensive, memory test */
  69 #undef  CONFIG_SYS_ALT_MEMTEST
  70 /* Scratch address used by the alternate memory test */
  71 #undef  CONFIG_SYS_MEMTEST_SCRATCH
  72
  73 /* Enable temporary baudrate change while serial download */
  74 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  75
  76 /* FLASH */
  77 #define CONFIG_FLASH_CFI_DRIVER 1
  78 #define CONFIG_SYS_FLASH_CFI
  79 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  80 #define CONFIG_SYS_FLASH_EMPTY_INFO
  81 #define CONFIG_SYS_FLASH_BASE   (0xA0000000)
  82 #define CONFIG_SYS_MAX_FLASH_SECT       512
  83
  84 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
  85 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  86 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  87
  88 /* Timeout for Flash erase operations (in ms) */
  89 #define CONFIG_SYS_FLASH_ERASE_TOUT     (3 * 1000)
  90 /* Timeout for Flash write operations (in ms) */
  91 #define CONFIG_SYS_FLASH_WRITE_TOUT     (3 * 1000)
  92 /* Timeout for Flash set sector lock bit operations (in ms) */
  93 #define CONFIG_SYS_FLASH_LOCK_TOUT      (3 * 1000)
  94 /* Timeout for Flash clear lock bit operations (in ms) */
  95 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    (3 * 1000)
  96
  97 /*
  98  * Use hardware flash sectors protection instead
  99  * of U-Boot software protection
 100  */
 101 #undef  CONFIG_SYS_FLASH_PROTECTION
 102 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
 103
 104 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
 105 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
 106 /* Monitor size */
 107 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)
 108 /* Size of DRAM reserved for malloc() use */
 109 #define CONFIG_SYS_MALLOC_LEN   (256 * 1024)
 110 #define CONFIG_SYS_BOOTMAPSZ    (8 * 1024 * 1024)
 111
 112 /* ENV setting */
 113 #define CONFIG_ENV_OVERWRITE    1
 114 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 115 #define CONFIG_ENV_SIZE         (CONFIG_ENV_SECT_SIZE)
 116 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 117 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
 118 #define CONFIG_ENV_OFFSET       (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
 119 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SECT_SIZE)
 120
 121 /* Board Clock */
 122 #if defined(CONFIG_400MHZ_MODE)
 123 #define CONFIG_SYS_CLK_FREQ 50000000
 124 #else
 125 #define CONFIG_SYS_CLK_FREQ 44444444
 126 #endif
 127 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
 128 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 129 #define CONFIG_SYS_TMU_CLK_DIV      4
 130
 131 #endif  /* __R0P7734_H */