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[people/ms/u-boot.git] / include / configs / rk3188_common.h
1 /*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __CONFIG_RK3188_COMMON_H
8 #define __CONFIG_RK3188_COMMON_H
9
10 #define CONFIG_SYS_CACHELINE_SIZE 64
11
12 #include <asm/arch/hardware.h>
13 #include "rockchip-common.h"
14
15 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
16 #define CONFIG_NR_DRAM_BANKS 1
17 #define CONFIG_ENV_SIZE 0x2000
18 #define CONFIG_SYS_MAXARGS 16
19 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
20 #define CONFIG_SYS_CBSIZE 1024
21
22 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
23 #define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */
24 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
25 #define CONFIG_SYS_TIMER_COUNTS_DOWN
26
27 #define CONFIG_SYS_NS16550_MEM32
28 #define CONFIG_SPL_BOARD_INIT
29
30 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
31 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
32 #define CONFIG_SYS_TEXT_BASE 0x60000000
33 #else
34 #define CONFIG_SYS_TEXT_BASE 0x60100000
35 #endif
36 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
37 #define CONFIG_SYS_LOAD_ADDR 0x60800800
38
39 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
40 #define CONFIG_ROCKCHIP_CHIP_TAG "RK31"
41
42 #ifdef CONFIG_TPL_BUILD
43 #define CONFIG_SPL_TEXT_BASE 0x10080804
44 /* tpl size 1kb - 4byte RK31 header */
45 #define CONFIG_SPL_MAX_SIZE (0x400 - 0x4)
46 #elif defined(CONFIG_SPL_BUILD)
47 /* spl size 32kb sram - 2kb bootrom - 1kb spl */
48 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0xC00)
49 #define CONFIG_SPL_TEXT_BASE 0x10080C00
50 #define CONFIG_SPL_FRAMEWORK 1
51 #define CONFIG_SPL_CLK 1
52 #define CONFIG_SPL_PINCTRL 1
53 #define CONFIG_SPL_REGMAP 1
54 #define CONFIG_SPL_SYSCON 1
55 #define CONFIG_SPL_RAM 1
56 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 1
57 #define CONFIG_ROCKCHIP_SERIAL 1
58 #endif
59
60 #define CONFIG_SPL_STACK 0x10087fff
61
62 /* MMC/SD IP block */
63 #define CONFIG_BOUNCE_BUFFER
64
65 #define CONFIG_FAT_WRITE
66
67 #define CONFIG_SYS_SDRAM_BASE 0x60000000
68 #define CONFIG_NR_DRAM_BANKS 1
69 #define SDRAM_BANK_SIZE (2UL << 30)
70
71 #define CONFIG_SPI_FLASH
72 #define CONFIG_SPI
73 #define CONFIG_SF_DEFAULT_SPEED 20000000
74
75 #ifndef CONFIG_SPL_BUILD
76 /* usb otg */
77 #define CONFIG_USB_GADGET
78 #define CONFIG_USB_GADGET_DUALSPEED
79 #define CONFIG_USB_GADGET_DWC2_OTG
80 #define CONFIG_ROCKCHIP_USB2_PHY
81 #define CONFIG_USB_GADGET_VBUS_DRAW 0
82
83 #define CONFIG_USB_GADGET_DOWNLOAD
84 #define CONFIG_G_DNL_MANUFACTURER "Rockchip"
85 #define CONFIG_G_DNL_VENDOR_NUM 0x2207
86 #define CONFIG_G_DNL_PRODUCT_NUM 0x310a
87
88 /* usb host support */
89 #ifdef CONFIG_CMD_USB
90 #define CONFIG_USB_DWC2
91 #define CONFIG_USB_HOST_ETHER
92 #define CONFIG_USB_ETHER_SMSC95XX
93 #define CONFIG_USB_ETHER_ASIX
94 #endif
95 #define ENV_MEM_LAYOUT_SETTINGS \
96 "scriptaddr=0x60000000\0" \
97 "pxefile_addr_r=0x60100000\0" \
98 "fdt_addr_r=0x61f00000\0" \
99 "kernel_addr_r=0x62000000\0" \
100 "ramdisk_addr_r=0x64000000\0"
101
102 #include <config_distro_bootcmd.h>
103
104 /* Linux fails to load the fdt if it's loaded above 256M on a Rock board,
105 * so limit the fdt reallocation to that */
106 #define CONFIG_EXTRA_ENV_SETTINGS \
107 "fdt_high=0x6fffffff\0" \
108 "initrd_high=0x6fffffff\0" \
109 "partitions=" PARTS_DEFAULT \
110 ENV_MEM_LAYOUT_SETTINGS \
111 ROCKCHIP_DEVICE_SETTINGS \
112 BOOTENV
113
114 #endif /* CONFIG_SPL_BUILD */
115
116 #define CONFIG_PREBOOT
117
118 #endif