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1 /*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __CONFIG_RK3288_COMMON_H
8 #define __CONFIG_RK3288_COMMON_H
9
10 #include <asm/arch/hardware.h>
11
12 #define CONFIG_SYS_NO_FLASH
13 #define CONFIG_NR_DRAM_BANKS 1
14 #define CONFIG_ENV_SIZE 0x2000
15 #define CONFIG_SYS_MAXARGS 16
16 #define CONFIG_BAUDRATE 115200
17 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
18 #define CONFIG_SYS_CBSIZE 1024
19 #define CONFIG_SYS_THUMB_BUILD
20 #define CONFIG_DISPLAY_BOARDINFO
21
22 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
23 #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
24 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
25
26 #define CONFIG_SPL_FRAMEWORK
27 #define CONFIG_SPL_LIBGENERIC_SUPPORT
28 #define CONFIG_SPL_SERIAL_SUPPORT
29 #define CONFIG_SYS_NS16550_MEM32
30 #define CONFIG_SPL_BOARD_INIT
31
32 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
33 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
34 #define CONFIG_SYS_TEXT_BASE 0x00000000
35 #else
36 #define CONFIG_SYS_TEXT_BASE 0x00100000
37 #endif
38 #define CONFIG_SYS_INIT_SP_ADDR 0x00100000
39 #define CONFIG_SYS_LOAD_ADDR 0x00800800
40 #define CONFIG_SPL_STACK 0xff718000
41 #define CONFIG_SPL_TEXT_BASE 0xff704004
42
43 #define CONFIG_SILENT_CONSOLE
44 #ifndef CONFIG_SPL_BUILD
45 # define CONFIG_SYS_CONSOLE_IS_IN_ENV
46 # define CONFIG_CONSOLE_MUX
47 #endif
48
49 /* MMC/SD IP block */
50 #define CONFIG_MMC
51 #define CONFIG_GENERIC_MMC
52 #define CONFIG_DWMMC
53 #define CONFIG_BOUNCE_BUFFER
54
55 #define CONFIG_FAT_WRITE
56 #define CONFIG_PARTITION_UUIDS
57 #define CONFIG_CMD_PART
58
59 /* RAW SD card / eMMC locations. */
60 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
61 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
62
63 /* FAT sd card locations. */
64 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
65 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
66
67 #define CONFIG_SPL_PINCTRL_SUPPORT
68
69 #define CONFIG_SYS_SDRAM_BASE 0
70 #define CONFIG_NR_DRAM_BANKS 1
71 #define SDRAM_BANK_SIZE (2UL << 30)
72
73 #define CONFIG_SPI_FLASH
74 #define CONFIG_SPI
75 #define CONFIG_SF_DEFAULT_SPEED 20000000
76
77 #ifndef CONFIG_SPL_BUILD
78 /* usb otg */
79 #define CONFIG_USB_GADGET
80 #define CONFIG_USB_GADGET_DUALSPEED
81 #define CONFIG_USB_GADGET_DWC2_OTG
82 #define CONFIG_ROCKCHIP_USB2_PHY
83 #define CONFIG_USB_GADGET_VBUS_DRAW 0
84
85 /* fastboot */
86 #define CONFIG_CMD_FASTBOOT
87 #define CONFIG_USB_FUNCTION_FASTBOOT
88 #define CONFIG_FASTBOOT_FLASH
89 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */
90 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
91 #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
92
93 /* usb mass storage */
94 #define CONFIG_USB_FUNCTION_MASS_STORAGE
95 #define CONFIG_CMD_USB_MASS_STORAGE
96
97 #define CONFIG_USB_GADGET_DOWNLOAD
98 #define CONFIG_G_DNL_MANUFACTURER "Rockchip"
99 #define CONFIG_G_DNL_VENDOR_NUM 0x2207
100 #define CONFIG_G_DNL_PRODUCT_NUM 0x320a
101
102 /* Enable gpt partition table */
103 #define CONFIG_CMD_GPT
104
105 #include <config_distro_defaults.h>
106
107 #define ENV_MEM_LAYOUT_SETTINGS \
108 "scriptaddr=0x00000000\0" \
109 "pxefile_addr_r=0x00100000\0" \
110 "fdt_addr_r=0x01f00000\0" \
111 "kernel_addr_r=0x02000000\0" \
112 "ramdisk_addr_r=0x04000000\0"
113
114 #define CONFIG_RANDOM_UUID
115 #define PARTS_DEFAULT \
116 "uuid_disk=${uuid_gpt_disk};" \
117 "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
118 "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
119
120 /* First try to boot from SD (index 0), then eMMC (index 1 */
121 #define BOOT_TARGET_DEVICES(func) \
122 func(MMC, mmc, 0) \
123 func(MMC, mmc, 1)
124
125 #include <config_distro_bootcmd.h>
126
127 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
128 * limit the fdt reallocation to that */
129 #define CONFIG_EXTRA_ENV_SETTINGS \
130 "fdt_high=0x1fffffff\0" \
131 "initrd_high=0x1fffffff\0" \
132 "partitions=" PARTS_DEFAULT \
133 ENV_MEM_LAYOUT_SETTINGS \
134 ROCKCHIP_DEVICE_SETTINGS \
135 BOOTENV
136 #endif
137
138 #endif