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flash: complete CONFIG_SYS_NO_FLASH move with renaming
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1 /*
2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #ifndef __CONFIG_RK3399_COMMON_H
8 #define __CONFIG_RK3399_COMMON_H
9
10 #include "rockchip-common.h"
11
12 #define CONFIG_NR_DRAM_BANKS 1
13 #define CONFIG_ENV_SIZE 0x2000
14 #define CONFIG_SYS_MAXARGS 16
15 #define CONFIG_BAUDRATE 1500000
16 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
17 #define CONFIG_SYS_CBSIZE 1024
18 #define CONFIG_SKIP_LOWLEVEL_INIT
19
20 #define CONFIG_SYS_NS16550_MEM32
21
22 #define CONFIG_SYS_TEXT_BASE 0x00200000
23 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000
24 #define CONFIG_SYS_LOAD_ADDR 0x00800800
25
26 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
27
28 /* MMC/SD IP block */
29 #define CONFIG_BOUNCE_BUFFER
30 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
31
32 #define CONFIG_SUPPORT_VFAT
33 #define CONFIG_FS_FAT
34 #define CONFIG_FAT_WRITE
35 #define CONFIG_FS_EXT4
36
37 /* RAW SD card / eMMC locations. */
38 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
39
40 /* FAT sd card locations. */
41 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
42 #define CONFIG_SYS_SDRAM_BASE 0
43 #define CONFIG_NR_DRAM_BANKS 1
44
45 #define CONFIG_SPI_FLASH
46 #define CONFIG_SPI
47 #define CONFIG_SF_DEFAULT_SPEED 20000000
48
49 #ifndef CONFIG_SPL_BUILD
50
51 #define ENV_MEM_LAYOUT_SETTINGS \
52 "scriptaddr=0x00000000\0" \
53 "pxefile_addr_r=0x00100000\0" \
54 "fdt_addr_r=0x01f00000\0" \
55 "kernel_addr_r=0x02000000\0" \
56 "ramdisk_addr_r=0x04000000\0"
57
58 #include <config_distro_bootcmd.h>
59 #define CONFIG_EXTRA_ENV_SETTINGS \
60 ENV_MEM_LAYOUT_SETTINGS \
61 "partitions=" PARTS_DEFAULT \
62 BOOTENV
63
64 #endif
65
66 /* enable usb config for usb ether */
67 #define CONFIG_USB_HOST_ETHER
68
69 #define CONFIG_USB_ETHER_ASIX
70 #define CONFIG_USB_ETHER_ASIX88179
71 #define CONFIG_USB_ETHER_MCS7830
72 #define CONFIG_USB_ETHER_SMSC95XX
73 #define CONFIG_USB_ETHER_RTL8152
74
75 /* rockchip xhci host driver */
76 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
77
78 #endif