include/configs/rsk7203.h

   1 /*
   2  * Configuation settings for the Renesas Technology RSK 7203
   3  *
   4  * Copyright (C) 2008 Nobuhiro Iwamatsu
   5  * Copyright (C) 2008 Renesas Solutions Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __RSK7203_H
  11 #define __RSK7203_H
  12
  13 #define CONFIG_CPU_SH7203       1
  14 #define CONFIG_RSK7203  1
  15
  16 #define CONFIG_LOADADDR         0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
  17
  18 #define CONFIG_DISPLAY_BOARDINFO
  19 #undef  CONFIG_SHOW_BOOT_PROGRESS
  20
  21 /* MEMORY */
  22 #define RSK7203_SDRAM_BASE      0x0C000000
  23 #define RSK7203_FLASH_BASE_1    0x20000000      /* Non cache */
  24 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
  25
  26 #define CONFIG_SYS_TEXT_BASE    0x0C7C0000
  27 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  28 /* List of legal baudrate settings for this board */
  29 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  30
  31 /* SCIF */
  32 #define CONFIG_CONS_SCIF0       1
  33
  34 #define CONFIG_SYS_MEMTEST_START        RSK7203_SDRAM_BASE
  35 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
  36
  37 #define CONFIG_SYS_SDRAM_BASE           RSK7203_SDRAM_BASE
  38 #define CONFIG_SYS_SDRAM_SIZE           (32 * 1024 * 1024)
  39
  40 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
  41 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1
  42 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  43 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)
  44 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
  45
  46 /* FLASH */
  47 #define CONFIG_FLASH_CFI_DRIVER
  48 #define CONFIG_SYS_FLASH_CFI
  49 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  50 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  51 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* print 'E' for empty sector on flinfo */
  52 #define CONFIG_SYS_FLASH_BASE           RSK7203_FLASH_BASE_1
  53 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
  54 #define CONFIG_SYS_MAX_FLASH_SECT       64
  55 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  56
  57 #define CONFIG_ENV_SECT_SIZE    (64 * 1024)
  58 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
  59 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  60 #define CONFIG_SYS_FLASH_ERASE_TOUT     12000
  61 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
  62
  63 /* Board Clock */
  64 #define CONFIG_SYS_CLK_FREQ     33333333
  65 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  66 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  67 #define CMT_CLK_DIVIDER 32      /* 8 (default), 32, 128 or 512 */
  68 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
  69
  70 #endif  /* __RSK7203_H */