include/configs/rsk7203.h

   1 /*
   2  * Configuation settings for the Renesas Technology RSK 7203
   3  *
   4  * Copyright (C) 2008 Nobuhiro Iwamatsu
   5  * Copyright (C) 2008 Renesas Solutions Corp.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __RSK7203_H
  11 #define __RSK7203_H
  12
  13 #undef DEBUG
  14 #define CONFIG_CPU_SH7203       1
  15 #define CONFIG_RSK7203  1
  16
  17 #define CONFIG_CMD_SDRAM
  18 #define CONFIG_CMD_CACHE
  19
  20 #define CONFIG_BAUDRATE         115200
  21 #define CONFIG_BOOTARGS         "console=ttySC0,115200"
  22 #define CONFIG_LOADADDR         0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
  23
  24 #define CONFIG_VERSION_VARIABLE
  25 #undef  CONFIG_SHOW_BOOT_PROGRESS
  26
  27 /* MEMORY */
  28 #define RSK7203_SDRAM_BASE      0x0C000000
  29 #define RSK7203_FLASH_BASE_1    0x20000000      /* Non cache */
  30 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024)
  31
  32 #define CONFIG_SYS_TEXT_BASE    0x0C7C0000
  33 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  34 #define CONFIG_SYS_CBSIZE       256     /* Buffer size for input from the Console */
  35 #define CONFIG_SYS_PBSIZE       256     /* Buffer size for Console output */
  36 #define CONFIG_SYS_MAXARGS      16      /* max args accepted for monitor commands */
  37 /* Buffer size for Boot Arguments passed to kernel */
  38 #define CONFIG_SYS_BARGSIZE     512
  39 /* List of legal baudrate settings for this board */
  40 #define CONFIG_SYS_BAUDRATE_TABLE       { 115200 }
  41
  42 /* SCIF */
  43 #define CONFIG_SCIF_CONSOLE     1
  44 #define CONFIG_CONS_SCIF0       1
  45
  46 #define CONFIG_SYS_MEMTEST_START        RSK7203_SDRAM_BASE
  47 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024))
  48
  49 #define CONFIG_SYS_SDRAM_BASE           RSK7203_SDRAM_BASE
  50 #define CONFIG_SYS_SDRAM_SIZE           (32 * 1024 * 1024)
  51
  52 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 1024 * 1024)
  53 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1
  54 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  55 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)
  56 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
  57
  58 /* FLASH */
  59 #define CONFIG_FLASH_CFI_DRIVER
  60 #define CONFIG_SYS_FLASH_CFI
  61 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  62 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  63 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* print 'E' for empty sector on flinfo */
  64 #define CONFIG_SYS_FLASH_BASE           RSK7203_FLASH_BASE_1
  65 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
  66 #define CONFIG_SYS_MAX_FLASH_SECT       64
  67 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  68
  69 #define CONFIG_ENV_IS_IN_FLASH
  70 #define CONFIG_ENV_SECT_SIZE    (64 * 1024)
  71 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
  72 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  73 #define CONFIG_SYS_FLASH_ERASE_TOUT     12000
  74 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
  75
  76 /* Board Clock */
  77 #define CONFIG_SYS_CLK_FREQ     33333333
  78 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  79 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  80 #define CMT_CLK_DIVIDER 32      /* 8 (default), 32, 128 or 512 */
  81 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
  82
  83 /* Network interface */
  84 #define CONFIG_SMC911X
  85 #define CONFIG_SMC911X_16_BIT
  86 #define CONFIG_SMC911X_BASE (0x24000000)
  87
  88 #endif  /* __RSK7203_H */