include/configs/rsk7264.h

   1 /*
   2  * Configuation settings for the Renesas RSK2+SH7264 board
   3  *
   4  * Copyright (C) 2011 Renesas Electronics Europe Ltd.
   5  * Copyright (C) 2008 Nobuhiro Iwamatsu
   6  * Copyright (C) 2008 Renesas Solutions Corp.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __RSK7264_H
  12 #define __RSK7264_H
  13
  14 #undef DEBUG
  15 #define CONFIG_SH               1
  16 #define CONFIG_SH2              1
  17 #define CONFIG_SH2A             1
  18 #define CONFIG_CPU_SH7264       1
  19 #define CONFIG_RSK7264          1
  20
  21 #ifndef _CONFIG_CMD_DEFAULT_H
  22 # include <config_cmd_default.h>
  23 #endif
  24
  25 #define CONFIG_BAUDRATE         115200
  26 #define CONFIG_BOOTARGS         "console=ttySC3,115200"
  27 #define CONFIG_BOOTDELAY        3
  28 #define CONFIG_SYS_BAUDRATE_TABLE       { CONFIG_BAUDRATE }
  29
  30 #define CONFIG_SYS_LONGHELP     1       /* undef to save memory */
  31 #define CONFIG_SYS_PROMPT       "=> "   /* Monitor Command Prompt */
  32 #define CONFIG_SYS_CBSIZE       256     /* Buffer size for input from the Console */
  33 #define CONFIG_SYS_PBSIZE       256     /* Buffer size for Console output */
  34 #define CONFIG_SYS_MAXARGS      16      /* max args accepted for monitor commands */
  35
  36 /* Serial */
  37 #define CONFIG_SCIF_CONSOLE     1
  38 #define CONFIG_CONS_SCIF3       1
  39
  40 /* Memory */
  41 /* u-boot relocated to top 256KB of ram */
  42 #define CONFIG_SYS_TEXT_BASE            0x0CFC0000
  43 #define CONFIG_SYS_SDRAM_BASE           0x0C000000
  44 #define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024)
  45
  46 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  47 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE - 0x100000)
  48 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)
  49 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  50 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 4*1024*1024)
  51
  52 /* Flash */
  53 #define CONFIG_FLASH_CFI_DRIVER
  54 #define CONFIG_SYS_FLASH_CFI
  55 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
  56 #define CONFIG_SYS_FLASH_BASE           0x20000000 /* Non-cached */
  57 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  58 #define CONFIG_SYS_MAX_FLASH_SECT       512
  59
  60 #define CONFIG_ENV_IS_IN_FLASH  1
  61 #define CONFIG_ENV_OFFSET       (128 * 1024)
  62 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  63 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
  64 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
  65
  66 /* Board Clock */
  67 #define CONFIG_SYS_CLK_FREQ     36000000
  68 #define CMT_CLK_DIVIDER         32      /* 8 (default), 32, 128 or 512 */
  69 #define CONFIG_SYS_HZ           (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
  70
  71 /* Network interface */
  72 #define CONFIG_SMC911X
  73 #define CONFIG_SMC911X_16_BIT
  74 #define CONFIG_SMC911X_BASE     0x28000000
  75
  76 #endif  /* __RSK7264_H */