include/configs/rsk7264.h

   1 /*
   2  * Configuation settings for the Renesas RSK2+SH7264 board
   3  *
   4  * Copyright (C) 2011 Renesas Electronics Europe Ltd.
   5  * Copyright (C) 2008 Nobuhiro Iwamatsu
   6  * Copyright (C) 2008 Renesas Solutions Corp.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __RSK7264_H
  12 #define __RSK7264_H
  13
  14 #define CONFIG_CPU_SH7264       1
  15
  16 #define CONFIG_DISPLAY_BOARDINFO
  17
  18 #define CONFIG_SYS_BAUDRATE_TABLE       { CONFIG_BAUDRATE }
  19
  20 #define CONFIG_SYS_LONGHELP     1       /* undef to save memory */
  21 #define CONFIG_SYS_PBSIZE       256     /* Buffer size for Console output */
  22
  23 /* Serial */
  24 #define CONFIG_CONS_SCIF3       1
  25
  26 /* Memory */
  27 /* u-boot relocated to top 256KB of ram */
  28 #define CONFIG_SYS_TEXT_BASE            0x0CFC0000
  29 #define CONFIG_SYS_SDRAM_BASE           0x0C000000
  30 #define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024)
  31
  32 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  33 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE - 0x100000)
  34 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)
  35 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  36 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 4*1024*1024)
  37
  38 /* Flash */
  39 #define CONFIG_FLASH_CFI_DRIVER
  40 #define CONFIG_SYS_FLASH_CFI
  41 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
  42 #define CONFIG_SYS_FLASH_BASE           0x20000000 /* Non-cached */
  43 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  44 #define CONFIG_SYS_MAX_FLASH_SECT       512
  45
  46 #define CONFIG_ENV_OFFSET       (128 * 1024)
  47 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  48 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
  49 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
  50
  51 /* Board Clock */
  52 #define CONFIG_SYS_CLK_FREQ     36000000
  53 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  54 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  55 #define CMT_CLK_DIVIDER         32      /* 8 (default), 32, 128 or 512 */
  56 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
  57
  58 #endif  /* __RSK7264_H */